8 ( radxa,rock-4drockchip,rk3576 +7Radxa ROCK 4Daliases=/soc/i2c@27300000B/soc/i2c@2ac40000G/soc/i2c@2ac50000L/soc/i2c@2ac60000Q/soc/i2c@2ac70000V/soc/i2c@2ac80000[/soc/i2c@2ac90000`/soc/i2c@2aca0000e/soc/i2c@2acb0000j/soc/i2c@2ae80000o/soc/serial@2ad40000w/soc/serial@27310000/soc/serial@2ad50000/soc/serial@2ad60000/soc/serial@2ad70000/soc/serial@2ad80000/soc/serial@2ad90000/soc/serial@2ada0000/soc/serial@2adb0000/soc/serial@2adc0000/soc/serial@2afc0000/soc/serial@2afd0000/soc/spi@2acf0000/soc/spi@2ad00000/soc/spi@2ad10000/soc/spi@2ad20000/soc/spi@2ad30000/soc/ethernet@2a220000/soc/mmc@2a310000clock-xin32k fixed-clock xin32kclock-xin24m fixed-clockn6 xin24mclock-spll fixed-clock)׫ spllcpus+cpu-mapcluster0core0)core1)core2)core3)cluster1core0)core1)core2)core3) cpu@0-cpuarm,cortex-a539=psciK^ e yx  cpu@1-cpuarm,cortex-a539=psciK^ e   cpu@2-cpuarm,cortex-a539=psciK^ e   cpu@3-cpuarm,cortex-a539=psciK^ e   cpu@100-cpuarm,cortex-a729=psciK^ ey@ cpu@101-cpuarm,cortex-a729=psciK^ e cpu@102-cpuarm,cortex-a729=psciK^ e cpu@103-cpuarm,cortex-a729=psciK^ e  idle-statespscicpu-sleeparm,idle-statex  opp-table-cluster0operating-points-v2, opp-4080000007Q > ` `~L@opp-6000000007#F > ` `~L@opp-81600000070, > ` `~L@opp-10080000007< > ` `~L@opp-12000000007G > ` `~L@opp-14160000007Tfr >  ~L@opp-16080000007_" > q q~L@opp-18000000007kI > ~L@]opp-20160000007x) > ~L@opp-table-cluster1operating-points-v2,opp-4080000007Q > ` `~L@]opp-6000000007#F > ` `~L@opp-81600000070, > ` `~L@opp-10080000007< > ` `~L@opp-12000000007G > ` `~L@opp-14160000007Tfr > 4 4~L@opp-16080000007_" > @ @~L@opp-18000000007kI > 5 5~L@opp-20160000007x) > )$ )$~L@opp-22080000007h >HH~L@opp-table-gpuoperating-points-v2Xopp-3000000007 > ` ` Popp-4000000007ׄ > ` ` Popp-5000000007e > ` ` Popp-6000000007#F > ` ` Popp-7000000007)' >   Popp-8000000007/ > X X Popp-90000000075 > Popp-95000000078ـ > P P Pdisplay-subsystemrockchip,display-subsystemifirmwarescmi arm,scmi-smcoz+protocol@149 hdmi-soundsimple-audio-cardHDMIi2sokaysimple-audio-card,codecsimple-audio-card,cpupinctrlrockchip,rk3576-pinctrl+gpio@27320000rockchip,gpio-bank9'2^   +7gpio@2ae10000rockchip,gpio-bank9*^   +7gpio@2ae20000rockchip,gpio-bank9*^@   +7'gpio@2ae30000rockchip,gpio-bank9*^`   +7gpio@2ae40000rockchip,gpio-bank9*^   +7xpcfg-pull-upHpcfg-pull-downUpcfg-pull-nonedpcfg-pull-none-drv-level-2dqpcfg-pull-up-drv-level-2Hqpcfg-pull-up-drv-level-3Hqpcfg-pull-none-smtdaupll_clkcam_clk0cam_clk1cam_clk2can0can1clk0_32kclk1_32kclk_32kcpubigcpulitdebug0_testdebug1_testdebug2_testdebug3_testdebug4_testdebug5_testdebug6_testdebug7_testdpdsm_auddsmcdsmc_testclkdsmc_testdataedp_txemmcemmc-rstnout emmc-bus8emmc-clk emmc-cmdemmc-strb emmc_testclkemmc_testdataeth0eth0m0-miim meth0m0-rx_bus20  oeth0m0-tx_bus20   neth0m0-rgmii_clk peth0m0-rgmii_bus@qeth1eth0_ptpeth0_testrxclketh0_testrxdeth1_ptpeth1_testrxclketh1_testrxdeth_clk0_25methm0-clk0-25m-outreth_clk1_25mflexbus0flexbus1flexbus0_testclkflexbus0_testdataflexbus1_testclkflexbus1_testdatafspi0fspi0-pins  fspi0-csn0 fspi1fspi0_testclkfspi0_testdatafspi1_testclkfspi1_testdatagpuhdmi_txhdmi_txm0-pins   bhdmi-tx-scl chdmi-tx-sda di2c0i2c0m0-xfer   0i2c1i2c1m0-xfer   i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2c9i2c9m0-xfer   i3c0i3c1i3c0_sdai3c1_sdaisp_flashisp_prelightjtagmipinpupcie0pcie1pdm0pdm1pmu_debug_testpwm0pwm1pwm2ref_clk0ref_clk1ref_clk2sai0sai0m0-lrcksai0m0-sclksai0m0-sdi0sai0m0-sdi1 sai0m0-sdi2 sai0m0-sdi3 sai0m0-sdo0sai0m0-sdo1sai0m0-sdo2 sai0m0-sdo3sai1sai1m0-lrcksai1m0-sclksai1m0-sdi0 sai1m0-sdo0sai1m0-sdo1sai1m0-sdo2 sai1m0-sdo3 sai2sai2m0-lrcksai2m0-sclksai2m0-sdisai2m0-sdosai3sai3m0-lrcksai3m0-sclksai3m0-sdisai3m0-sdo sai4sai4m0-lrcksai4m0-sclksai4m0-sdisai4m0-sdo sata30sata30_port0sata30_port1sdmmc0sdmmc0-bus4@|sdmmc0-clkysdmmc0-cmdzsdmmc0-det{sdmmc0-pwren}sdmmc1sdmmc1m0-bus4@  sdmmc1m0-clksdmmc1m0-cmdsdmmc0_testclksdmmc0_testdatasdmmc1_testclksdmmc1_testdataspdifspi0spi0m0-pins0   spi0m0-csn0 spi0m0-csn1 spi1spi1m0-pins0   spi1m0-csn0 spi1m0-csn1 spi2spi2m0-pins0   spi2m0-csn0 spi2m0-csn1 spi3spi3m0-pins0   spi3m0-csn0 spi3m0-csn1 spi4spi4m0-pins0   spi4m0-csn0 spi4m0-csn1 test_clktsadctsadc_ctrluart0uart0m0-xfer   uart1uart1m0-xfer   2uart2uart2m0-xfer   uart3uart3m0-xfer   uart4uart4m0-xfer   uart5uart5m0-xfer   uart6uart6m0-xfer   uart7uart7m0-xfer   uart8uart8m0-xfer   uart9uart9m0-xfer   uart10uart10m0-xfer   uart11uart11m0-xfer   ufsufs-refclkwufs_testdata0ufs_testdata1ufs_testdata2ufs_testdata3vi_cifvo_lcdcvo_postvp0_syncvp1_syncvp2_syncpmicpmic-pins   vovo_ebchym8563hym8563-intledsled-green-en led-red-enrtl8211frtl8211f-rst spciepcie-pwrenpcie-reset &usbusb-host-pwrenusb-otg-pwrenwifiusb-wifi-pwrwifi-en-hpmu-a53arm,cortex-a53-pmu0 pmu-a72arm,cortex-a72-pmu0  psci arm,psci-1.0Dsmcthermal-zonespackage-thermaltripspackage-crit8 4criticalbigcore-thermaldtripsbigcore-alertL4passivebigcore-crit8 4criticalcooling-mapsmap00 littlecore-thermaldtripslittlecore-alertL4passive littlecore-crit8 4criticalcooling-mapsmap0 0gpu-thermaldtripsgpu-alertL4passive!gpu-crit8 4criticalcooling-mapsmap0! "npu-thermaltripsnpu-crit8 4criticalddr-thermaltripsddr-crit8 4criticaltimerarm,armv8-timer0    soc simple-bus+pcie@22000000*rockchip,rk3576-pcierockchip,rk3568-pcie09"@*  dbiapbconfig(^$)aclk_mstaclk_slvaclk_dbipclkaux-pciH 5syspmcmsglegacyerrmsi7E`X####fw$ pcie-phy%T     pwrpipe+okaydefault& ' (legacy-interrupt-controller7   #pcie@22400000*rockchip,rk3576-pcierockchip,rk3568-pcie09"@@*!!dbiapbconfig /(^  $)aclk_mstaclk_slvaclk_dbipclkaux-pciH      5syspmcmsglegacyerrmsi7E`X))))fw* pcie-phy% T!!! !   pwrpipe+ disabledlegacy-interrupt-controller7    )usb@23000000rockchip,rk3576-dwc3snps,dwc39#@^EFD)ref_clksuspend_clkbus_clk  %host +,usb2-phyusb3-phy 'utmi_wide0H`xokayusb@23400000rockchip,rk3576-dwc3snps,dwc39#@@^)ref_clksuspend_clkbus_clk  %host -*usb2-phyusb3-phy 'utmi_wide0H`x4okaysyscon@2600a000rockchip,rk3576-sys-grfsyscon9& \syscon@2600c000#rockchip,rk3576-bigcore-grfsyscon9& syscon@2600e000#rockchip,rk3576-litcore-grfsyscon9& syscon@26010000rockchip,rk3576-cci-grfsyscon9& syscon@26016000rockchip,rk3576-gpu-grfsyscon9&` syscon@26018000rockchip,rk3576-npu-grfsyscon9& syscon@2601a000rockchip,rk3576-vo0-grfsyscon9& asyscon@2601e000rockchip,rk3576-usb-grfsyscon9&syscon@26020000rockchip,rk3576-php-grfsyscon9& syscon@26024000+rockchip,rk3576-pmu0-grfsysconsimple-mfd9&@syscon@26026000 rockchip,rk3576-pmu1-grfsyscon9&`syscon@26028000$rockchip,rk3576-pipe-phy-grfsyscon9& syscon@2602a000$rockchip,rk3576-pipe-phy-grfsyscon9& syscon@2602c000$rockchip,rk3576-usbdpphy-grfsyscon9& syscon@2602e000.rockchip,rk3576-usb2phy-grfsysconsimple-mfd9&@+usb2-phy@0rockchip,rk3576-usb2phy9phyapb^GH)phyclkaclkaclk_slv  usb480m_phy0okayotg-portA$ ^_`5otg-bvalidotg-idlinestateokayL.+usb2-phy@2000rockchip,rk3576-usb2phy9 phyapb^  )phyclkaclkaclk_slv  usb480m_phy1okayotg-portA$ bcd5otg-bvalidotg-idlinestateokayL/-syscon@26032000$rockchip,rk3576-hdptxphy-grfsyscon9& syscon@26034000!rockchip,rk3576-dcphy-grfsyscon9&@ ^syscon@26036000rockchip,rk3576-vo1-grfsyscon9&`^syscon@26038000"rockchip,rk3576-sdgmac-grfsyscon9&hsyscon@26040000*rockchip,rk3576-ioc-grfsysconsimple-mfd9&clock-controller@27200000rockchip,rk3576-cru9' Wpd  t8Fq;.@ e沀e沀i2c@27300000(rockchip,rk3576-i2crockchip,rk3399-i2c9'0^ )i2cpclk  Xdefault0+ disabledserial@27310000&rockchip,rk3576-uartsnps,dw-apb-uart9'1^)baudclkapb_pclk11   Mdefault2 disabledpower-management@27380000&rockchip,rk3576-pmusysconsimple-mfd9'8]power-controller!rockchip,rk3576-power-controller+%power-domain@09+power-domain@19@^34567+power-domain@29^8power-domain@39^9power-domain@49^:power-domain@59^;<+power-domain@69H^3"(0#)=>?@ABpower-domain@89 ^ CD+power-domain@99 power-domain@109 power-domain@129 ^Epower-domain@139 P^\[RSPOXWUTFGHIJpower-domain@149^=>Kpower-domain@159`^ghfcdeilmpnoLMNOP+power-domain@119 ^a`Qpower-domain@189 ^RS+power-domain@79(^BGHITUpower-domain@169(^Vpower-domain@179(^Wgpu@27800000&rockchip,rk3576-maliarm,mali-bifrost9' d  =^)coreyY$ [\] 5jobmmugpueX%okayY"vop@27d00000rockchip,rk3576-vop 9'0'Pvopgamma-lut0 V{|}5sysvp0vp1vp2,^Z2)aclkhclkdclk_vp0dclk_vp1dclk_vp2pll_hdmiphy0[%\]okayports+port@0+9endpoint@29^eport@1+9port@2+9iommu@27d07e00,rockchip,rk3576-iommurockchip,rk3568-iommu 9'~'  V^ )aclkiface%okay[sai@27d40000rockchip,rk3576-sai9'  ^ )mclkhclk_rx%ijmh4ESAI5 disabledsai@27d50000rockchip,rk3576-sai9'  ^ )mclkhclk__txrx%klmhW4ESAI6okaydsi@27d80000rockchip,rk3576-mipi-dsi29'  Y^ )pclksys%capb` dcphya disabledports+port@09port@19hdmi@27da0000rockchip,rk3576-dw-hdmi-qp9'0^)pclkearcrefaudhdphclk_vo1< RSTUo5avpcecearcmainhpdZdefault bcd%frefhdpma4okayports+port@09endpointe^port@19endpointfsai@27ed0000rockchip,rk3576-sai9'  ^ )mclkhclk_tx%uvmhW4ESAI7 disabledsai@27ee0000rockchip,rk3576-sai9'  t^ )mclkhclkgtx%rqmhW4ESAI8 disabledsai@27ef0000rockchip,rk3576-sai9'  u^ )mclkhclk1tx%mhW4ESAI9 disabledqos@27f02000rockchip,rk3576-qossyscon9' Wqos@27f04000rockchip,rk3576-qossyscon9'@ =qos@27f04080rockchip,rk3576-qossyscon9'@ >qos@27f04100rockchip,rk3576-qossyscon9'A ?qos@27f04180rockchip,rk3576-qossyscon9'A @qos@27f04200rockchip,rk3576-qossyscon9'B Aqos@27f04280rockchip,rk3576-qossyscon9'B Bqos@27f05000rockchip,rk3576-qossyscon9'P :qos@27f06000rockchip,rk3576-qossyscon9'` Eqos@27f08000rockchip,rk3576-qossyscon9' 3qos@27f08080rockchip,rk3576-qossyscon9' 4qos@27f08100rockchip,rk3576-qossyscon9' 5qos@27f09000rockchip,rk3576-qossyscon9' ;qos@27f09080rockchip,rk3576-qossyscon9' <qos@27f0a000rockchip,rk3576-qossyscon9' Cqos@27f0a080rockchip,rk3576-qossyscon9' Dqos@27f0c000rockchip,rk3576-qossyscon9' Kqos@27f0d000rockchip,rk3576-qossyscon9' qos@27f0e000rockchip,rk3576-qossyscon9' Tqos@27f0e080rockchip,rk3576-qossyscon9' Uqos@27f0f000rockchip,rk3576-qossyscon9' Qqos@27f10000rockchip,rk3576-qossyscon9' Lqos@27f10080rockchip,rk3576-qossyscon9' Mqos@27f10100rockchip,rk3576-qossyscon9' Nqos@27f10180rockchip,rk3576-qossyscon9' Oqos@27f10200rockchip,rk3576-qossyscon9' Pqos@27f11000rockchip,rk3576-qossyscon9' Vqos@27f12800rockchip,rk3576-qossyscon9'( Rqos@27f12880rockchip,rk3576-qossyscon9'( Sqos@27f13000rockchip,rk3576-qossyscon9'0 Fqos@27f13080rockchip,rk3576-qossyscon9'0 Hqos@27f13100rockchip,rk3576-qossyscon9'1 Iqos@27f13180rockchip,rk3576-qossyscon9'1 Gqos@27f13200rockchip,rk3576-qossyscon9'2 Jqos@27f20000rockchip,rk3576-qossyscon9' 8qos@27f21000rockchip,rk3576-qossyscon9' 9qos@27f22080rockchip,rk3576-qossyscon9' 6qos@27f22100rockchip,rk3576-qossyscon9'! 7ethernet@2a220000&rockchip,rk3576-gmacsnps,dwmac-4.20a9*"(^$. %0)stmmacethclk_mac_refpclk_macaclk_macptp_ref %*5macirqeth_wake_irq% stmmacethh}ijkokayoutputl rgmii-iddefaultmnopqrmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c9169^+d+}x@defaultsN  ' lstmmac-axi-config!+;irx-queues-configKjqueue0tx-queues-configakqueue0ethernet@2a230000&rockchip,rk3576-gmacsnps,dwmac-4.20a9*#(^%/!$0)stmmacethclk_mac_refpclk_macaclk_macptp_ref -25macirqeth_wake_irq%  stmmacethh}tuv disabledmdiosnps,dwmac-mdio+stmmac-axi-config!+;trx-queues-configKuqueue0tx-queues-configavqueue0sata@2a240000'rockchip,rk3576-dwc-ahcisnps,dwc-ahci9*$^)satapmaliverxoob  % $ sata-phyw4 disabledsata@2a250000'rockchip,rk3576-dwc-ahcisnps,dwc-ahci9*%^)satapmaliverxoob  % * sata-phyw4 disabledufshc@2a2d0000rockchip,rk3576-ufshcP9*-+&&*."hcimphyhci_grfmphy_grfhci_apb ^IC)corepclkpclk_mphyref_outdt;  i%wdefault !"$biusysufsgrf xokayspi@2a300000 rockchip,sfc9*0@  ^*+)clk_sfchclk_sfc%+ disabledmmc@2a310000rockchip,rk3576-dw-mshc9*1@^)()biuciu   defaultyz{|}% resetokay~ mmc@2a320000rockchip,rk3576-dw-mshc9*2@^#")biuciu    default% reset disabledmmc@2a3300000rockchip,rk3576-dwcmshcrockchip,rk3588-dwcmshc9*3d  n6 (^)corebusaxiblocktimer   default%(corebusaxiblocktimer  disabledspi@2a340000 rockchip,sfc9*4@  ^)clk_sfchclk_sfc%+okaydefaultflash@0jedec,spi-nor9  / @ Qrng@2a410000rockchip,rk3576-rng9*A^  otp@2a580000rockchip,rk3576-otp9*X+^1)otpapb_pclkphyotpapbcpu-code@29cpu-version@59 \id@a9 cpub-leakage@1e9cpul-leakage@1f9npu-leakage@209 gpu-leakage@219!log-leakage@229"bigcore-tsadc-trim@249$ \ litcore-tsadc-trim@269& \ ddr-tsadc-trim@289( \ npu-tsadc-trim@2a9* \ gpu-tsadc-trim@2c9, \ soc-tsadc-trim@649d \ sai@2a600000rockchip,rk3576-sai9*`  ^@A )mclkhclk11txrx% mhdefault(4ESAI0 disabledsai@2a610000rockchip,rk3576-sai9*a  ^GH )mclkhclk11txrx% mhdefault4ESAI1 disabledsai@2a620000rockchip,rk3576-sai9*b  ^JK )mclkhclkggtxrx% mhdefault4ESAI2 disabledsai@2a630000rockchip,rk3576-sai9*c  ^MN )mclkhclkggtxrx% mhdefault4ESAI3 disabledsai@2a640000rockchip,rk3576-sai9*d  ^PQ )mclkhclk__txrx% mhdefault4ESAI4 disabledinterrupt-controller@2a701000 arm,gic-400@9*p*p *p@*p`   7+dma-controller@2ab90000arm,pl330arm,primecell9*@ a^ )apb_pclk ! x1dma-controller@2abb0000arm,pl330arm,primecell9*@ a^ )apb_pclk "# xgdma-controller@2abd0000arm,pl330arm,primecell9*@ a^ )apb_pclk $% x_i2c@2ac40000(rockchip,rk3576-i2crockchip,rk3399-i2c9*^th )i2cpclk  Ydefault+okaypmic@23rockchip,rk8069#+  default             ! . ; Hdvs1-null-pinsgpio_pwrctrl1 Tpin_fun0dvs1-pwrdn-pinsgpio_pwrctrl1 Tpin_fun2dvs1-rst-pinsgpio_pwrctrl1 Tpin_fun3dvs1-slp-pinsgpio_pwrctrl1 Tpin_fun1dvs2-dvs-pinsgpio_pwrctrl2 Tpin_fun4dvs2-gpio-pinsgpio_pwrctrl2 Tpin_fun5dvs2-null-pinsgpio_pwrctrl2 Tpin_fun0dvs2-pwrdn-pinsgpio_pwrctrl2 Tpin_fun2dvs2-rst-pinsgpio_pwrctrl2 Tpin_fun3dvs2-slp-pinsgpio_pwrctrl2 Tpin_fun1dvs3-dvs-pinsgpio_pwrctrl3 Tpin_fun4dvs3-gpio-pinsgpio_pwrctrl3 Tpin_fun5dvs3-null-pinsgpio_pwrctrl3 Tpin_fun0dvs3-pwrdn-pinsgpio_pwrctrl3 Tpin_fun2dvs3-rst-pinsgpio_pwrctrl3 Tpin_fun3dvs3-slp-pinsgpio_pwrctrl3 Tpin_fun1regulatorsdcdc-reg1 ] q  dp ~ vdd_cpu_big_s0 0regulator-state-mem dcdc-reg2 q  dp ~ vdd_npu_s0 0regulator-state-mem dcdc-reg3 ] q dp ~ vdd_cpu_lit_s0 0 regulator-state-mem  qdcdc-reg4 ] q 2Z 2Z vcc_3v3_s3~regulator-state-mem ( 2Zdcdc-reg5 q  dp  vdd_gpu_s0 0Yregulator-state-mem  Pdcdc-reg6 ] q vddq_ddr_s0regulator-state-mem dcdc-reg7 ] q dp 5 vdd_logic_s0regulator-state-mem dcdc-reg8 ] q w@ w@ vcc_1v8_s3regulator-state-mem ( w@dcdc-reg9 ] q vdd2_ddr_s3regulator-state-mem (dcdc-reg10 ] q dp O vdd_ddr_s0regulator-state-mem pldo-reg1 ] q w@ w@ vcca_1v8_s0regulator-state-mem pldo-reg2 ] q w@ w@ vcca1v8_pldo2_s0regulator-state-mem pldo-reg3 ] q O O vdda_1v2_s0regulator-state-mem pldo-reg4 ] q 2Z 2Z vcca_3v3_s0regulator-state-mem pldo-reg5 ] q w@ 2Z vccio_sd_s0regulator-state-mem pldo-reg6 ] q w@ w@ vcca1v8_pldo6_s3regulator-state-mem ( w@nldo-reg1 ] q q q vdd_0v75_s3regulator-state-mem ( qnldo-reg2 ] q P P vdda_ddr_pll_s0regulator-state-mem nldo-reg3 ] q | | vdda0v75_hdmi_s0regulator-state-mem nldo-reg4 ] q P P vdda_0v85_s0regulator-state-mem nldo-reg5 ] q q q vdda_0v75_s0regulator-state-mem i2c@2ac50000(rockchip,rk3576-i2crockchip,rk3399-i2c9*^ui )i2cpclk  Zdefault+okayrtc@51haoyu,hym85639Q hym8563  default @i2c@2ac60000(rockchip,rk3576-i2crockchip,rk3399-i2c9*^vj )i2cpclk  [default+ disabledi2c@2ac70000(rockchip,rk3576-i2crockchip,rk3399-i2c9*^wk )i2cpclk  \default+ disabledi2c@2ac80000(rockchip,rk3576-i2crockchip,rk3399-i2c9*^xl )i2cpclk  ]default+ disabledi2c@2ac90000(rockchip,rk3576-i2crockchip,rk3399-i2c9*^ym )i2cpclk  ^default+ disabledi2c@2aca0000(rockchip,rk3576-i2crockchip,rk3399-i2c9*^zn )i2cpclk  _default+ disabledi2c@2acb0000(rockchip,rk3576-i2crockchip,rk3399-i2c9*^{o )i2cpclk  `default+ disabledtimer@2acc0000,rockchip,rk3576-timerrockchip,rk3288-timer9* ^ )pclktimer  -watchdog@2ace0000 rockchip,rk3576-wdtsnps,dw-wdt9*^ )tclkpclk  (spi@2acf0000(rockchip,rk3576-spirockchip,rk3066-spi9*^)spiclkapb_pclk11txrx  t Ndefault + disabledspi@2ad00000(rockchip,rk3576-spirockchip,rk3066-spi9*^)spiclkapb_pclk11txrx  u Ndefault + disabledspi@2ad10000(rockchip,rk3576-spirockchip,rk3066-spi9*^)spiclkapb_pclkggtxrx  v Ndefault + disabledspi@2ad20000(rockchip,rk3576-spirockchip,rk3066-spi9*^)spiclkapb_pclkggtxrx  w Ndefault + disabledspi@2ad30000(rockchip,rk3576-spirockchip,rk3066-spi9*^)spiclkapb_pclk_ _ txrx  x Ndefault + disabledserial@2ad40000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclk11txrx  Ldefaultokayserial@2ad50000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclk1 1 txrx  Ndefault disabledserial@2ad60000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclk1 1 txrx  Odefault disabledserial@2ad70000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclkg g txrx  Pdefault disabledserial@2ad80000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclkg g txrx  Qdefault disabledserial@2ad90000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclkg gtxrx  Rdefault disabledserial@2ada0000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclk__txrx  Sdefault disabledserial@2adb0000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclk__ txrx  Tdefault disabledserial@2adc0000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclk_ _ txrx  Udefault disabledadc@2ae00000.rockchip,rk3576-saradcrockchip,rk3588-saradc9*^~})saradcapb_pclk  |H saradc-apb U disabledtsadc@2ae70000rockchip,rk3576-tsadc9*  {^)tsadcapb_pclkdJKtsadc-apbtsadc g }  +sensor@09  trimsensor@19  trimsensor@29  trimsensor@39  trimsensor@49  trimsensor@59  trimi2c@2ae80000(rockchip,rk3576-i2crockchip,rk3399-i2c9*^|p )i2cpclk  adefault+ disabledserial@2afc0000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclk__  Vdefault disabledserial@2afd0000&rockchip,rk3576-uartsnps,dw-apb-uart9*^)baudclkapb_pclk__  Wdefault disabledphy@2b020000rockchip,rk3576-mipi-dcphy9+^ )pclkref m_phyapbgrfs_phyA disabled`phy@2b050000rockchip,rk3576-naneng-combphy9+A^95 )refapbpiped9phyapb  okay$phy@2b060000rockchip,rk3576-naneng-combphy9+A^:6  )refapbpiped:phyapb  okay*phy@2b010000rockchip,rk3576-usbdp-phy9+A^)refclkimmortalpclkutmi(initcmnlanepcs_apbpma_apb   /mokay,hdmiphy@2b0000004rockchip,rk3576-hdptx-phyrockchip,rk3588-hdptx-phy9+ ^!)refapb apbinitcmnlaneAokayZsram@3ff88000 mmio-sram9??+rkvdec-sram@09scmi-shmem@4010f000arm,scmi-shmem9@chosen Eserial0:1500000n8hdmi-conhdmi-connector4aportendpointfrfkill rfkill-gpiodefault Qwlan \'leds gpio-ledsdefaultpower-led k Tstatus   qdefault-onuser-led k Theartbeat   qheartbeatregulator-vcc-5v0-dcinregulator-fixed ] q LK@ LK@ vcc_5v0_dcinregulator-vcc-1v1-nldo-s3regulator-fixed ] q   vcc_1v1_nldo_s3 regulator-vcc-1v2-ufs-vccq-s0regulator-fixed ] q O O vcc_1v2_ufs_vccq_s0 regulator-vcc-1v8-s0regulator-fixed ] q w@ w@ vcc_1v8_s0 regulator-vcc-1v8-ufs-vccq2-s0regulator-fixed ] q w@ w@ vcc_1v8_ufs_vccq2_s0 regulator-vcc-2v0-pldo-s3regulator-fixed ] q   vcc_2v0_pldo_s3 regulator-vcc-3v3-pcieregulator-fixed   'default 2Z 2Z vcc_3v3_pcie  (regulator-vcc-3v3-rtc-s5regulator-fixed ] q 2Z 2Z vcc_3v3_rtc_s5 regulator-vcc-3v3-s0regulator-fixed ] q 2Z 2Z vcc_3v3_s0 ~regulator-vcc-ufs-s0regulator-fixed ] q 2Z 2Z vcc_3v3_ufs_s0 regulator-vcc-3v3-wifiregulator-fixed   'default ] 2Z 2Z vcc_3v3_wifi ~regulator-vcc-5v0-deviceregulator-fixed ] q LK@ LK@ vcc_5v0_device regulator-vcc-5v0-hostregulator-fixed   default ] q LK@ LK@ vcc5v0_host /regulator-vcc-5v0-otgregulator-fixed   'default ] q LK@ LK@ vcc5v0_otg .regulator-vcc-5v0-sysregulator-fixed ] q LK@ LK@ vcc_5v0_sys  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9serial10serial11spi0spi1spi2spi3spi4ethernet0mmc0clock-frequencyclock-output-names#clock-cellscpudevice_typeregenable-methodcapacity-dmips-mhzclocksoperating-points-v2dynamic-power-coefficientcpu-idle-states#cooling-cellscpu-supplyphandleentry-methodarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmemsimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-dairockchip,grfrangesgpio-controllergpio-rangesinterruptsinterrupt-controller#gpio-cells#interrupt-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsinterrupt-affinitypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereg-namesbus-rangeclock-namesinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-ib-windowsnum-viewportnum-ob-windowsnum-lanesphysphy-namespower-domainsresetsreset-namespinctrl-namespinctrl-0reset-gpiosvpcie3v3-supplydr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,parkmode-disable-hs-quirksnps,parkmode-disable-ss-quirksnps,dis_rxdet_inp3_quirkdma-coherent#phy-cellsphy-supply#reset-cellsassigned-clocksassigned-clock-parentsassigned-clock-ratesreg-shiftreg-io-widthdmas#power-domain-cellspm_qosmali-supplyiommusrockchip,pmuremote-endpoint#iommu-cellsdma-namesrockchip,sai-rx-route#sound-dai-cellssound-name-prefixrockchip,sai-tx-routerockchip,vo-grfrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-ussnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplysupports-cqespi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthvcc-supplybitsarm,pl330-periph-burst#dma-cellssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplyfunctionregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendwakeup-sourcenum-cs#io-channel-cells#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritynvmem-cellsnvmem-cell-namesrockchip,pipe-grfrockchip,pipe-phy-grfrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfstdout-pathradio-typeshutdown-gpioscolorlinux,default-triggervin-supplyenable-active-highstartup-delay-us