8{( {` ),Qualcomm Technologies, Inc. QCS8300 Ride2qcom,qcs8300-rideqcom,qcs8300 =embeddedclocksxo-board-clk 2fixed-clockJWIgRsleep-clk 2fixed-clockJW}g5cpus cpu@0ocpu2arm,cortex-a78c{pscipsci(gl2-cache2cache+ gcpu@100ocpu2arm,cortex-a78c{psci  psci(gl2-cache2cache+ g cpu@200ocpu2arm,cortex-a78c{psci  psci(gl2-cache2cache+ g cpu@300ocpu2arm,cortex-a78c{pscipsci(gl2-cache2cache+ gcpu@10000ocpu2arm,cortex-a55{pscipscid(g l2-cache2cache+gcpu@10100ocpu2arm,cortex-a55{pscipscid(g!l2-cache2cache+gcpu@10200ocpu2arm,cortex-a55{pscipscid(g"l2-cache2cache+gcpu@10300ocpu2arm,cortex-a55{pscipscid(g#l2-cache2cache+gcpu-mapcluster0core09core19core29core39cluster1core09 core19!core29"core39#l3-cache-02cache+g l3-cache-12cache+gidle-states=pscicpu-sleep-0-02arm,idle-stateJsilver-power-collapseZ@q!&g,cpu-sleep-0-12arm,idle-stateJsilver-rail-power-collapseZ@qZg-cpu-sleep-1-02arm,idle-stateJgold-power-collapseZ@q%g)cpu-sleep-1-12arm,idle-stateJgold-rail-power-collapseZ@q%g*domain-idle-statescluster-sleep-02domain-idle-stateZADq  g0cluster-sleep-12domain-idle-stateZADq  g/domain-sleep2domain-idle-stateZBDq 'g1opp-table-cpu02operating-points-v2gopp-9024000005Ɉ)opp-1017600000opp-1190400000FhLopp-1267200000Kopp-1344000000P opp-1420800000T2opp-1497600000YCXopp-1574400000]popp-1670400000cH`opp-1747200000h$(`opp-1824000000lopp-1900800000qKopp-1977600000u`opp-2054400000zs`opp-2112000000}opp-table-cpu22operating-points-v2gopp-9408000008x)opp-1094400000A;8>opp-1267200000KhLopp-1344000000Popp-1420800000Topp-1497600000YC opp-1574400000]p2opp-1632000000aFXXopp-1708800000e8opp-1804800000kopp-1900800000qKopp-1977600000u`opp-2054400000zsopp-2131200000`opp-2208000000h`opp-2284800000/Hopp-2361600000(opp-table-cpu42operating-points-v2gopp-8448000002Z)opp-1113600000B`0hLopp-1209600000Hopp-1305600000M opp-1382400000Re2opp-1459200000VXopp-1497600000YCopp-1574400000]popp-1651200000bkPopp-1728000000f0`opp-1804800000kopp-1881600000p&`opp-1958400000tdummy-sink2arm,coresight-dummy-sinkin-portsportendpoint$gfirmwarescm2qcom,scm-qcs8300qcom,scm%0memory@80000000omemory{interconnect-02qcom,qcs8300-clk-virt&g9interconnect-12qcom,qcs8300-mc-virt&gopp-table-qup2operating-points-v2gAopp-120000000''pmu-a552arm,cortex-a55-pmu &pmu-a782arm,cortex-a78-pmu &psci 2arm,psci-1.0smcpower-domain-cpu01(E)*gpower-domain-cpu11(E)*g power-domain-cpu21(E)*g power-domain-cpu31(E)*gpower-domain-cpu41+E,-gpower-domain-cpu51+E,-gpower-domain-cpu61+E,-gpower-domain-cpu71+E,-gpower-domain-cluster01.E/g(power-domain-cluster11.E0g+power-domain-system1E1g.reserved-memory Xaop-image-region@90800000{_aop-cmd-db-region@90860000 2qcom,cmd-db{_smem@90900000 2qcom,smem{ _f2lpass-machine-learning-region@93b00000{_adsp-rpc-remote-heap-region@94a00000{_gcamera-region@95200000{ P_adsp-region@95c00000_{gq6-adsp-dtb-region@97a00000{_q6-gpdsp-dtb-region@97a80000{_gpdsp-region@97b00000{_gVq6-cdsp-dtb-region@99900000{_cdsp-region@99980000{_g_gpu-microcode-region@9b780000{x _gBcvp-region@9b782000{x p_video-region@9be82000{ p_gMsmp2p-adsp 2qcom,smp2pn3 3slave-kernel slave-kernelgmaster-kernelmaster-kernelgsmp2p-cdsp 2qcom,smp2pn3 3^slave-kernel slave-kernelg]master-kernelmaster-kernelg`smp2p-gpdsp 2qcom,smp2pn3 3ihslave-kernel slave-kernelgTmaster-kernelmaster-kernelgWsoc@0 2simple-busX clock-controller@1000002qcom,qcs8300-gcc{ pJ1, 45g7mailbox@4080002qcom,qcs8300-ipccqcom,ipcc{@ &g3efuse@784000 2qcom,qcs8300-qfpromqcom,qfprom{x@$ gpu_speed_bin@240c{$ gAdma-controller@900000)2qcom,qcs8300-gpi-dmaqcom,sm6350-gpi-dma{$& /66 CT adisabledg>geniqup@9c00002qcom,geni-se-qup{ X 77 hm-ahbs-ahb  /6Taokayi2c@9800002qcom,geni-i2c{@ 7_hset8~default && H99:-;qup-corequp-configqup-memory<= >>txrx adisabledspi@9800002qcom,geni-spi{@ 7_hset?@~default && 099:-qup-corequp-config<A >>txrx adisabledserial@9800002qcom,geni-uart{@ 7_hsetBCDE~default &&099:-qup-corequp-config<A adisabledi2c@9840002qcom,geni-i2c{@@ 7ahsetF~default &' H99:-;qup-corequp-configqup-memory<= >>txrx adisabledspi@9840002qcom,geni-spi{@@ 7ahsetGH~default &' 099:-qup-corequp-config<A >>txrx adisabledserial@9840002qcom,geni-uart{@@ 7ahsetIJKL~default &'099:-qup-corequp-config<A adisabledi2c@9880002qcom,geni-i2c{@ 7chsetM~default & H99:-;qup-corequp-configqup-memory<= >>txrx adisabledspi@9880002qcom,geni-spi{@ 7chsetNO~default & 099:-qup-corequp-config<A >>txrx adisabledserial@9880002qcom,geni-uart{@ 7chsetPQRS~default &099:-qup-corequp-config<A adisabledi2c@98c0002qcom,geni-i2c{@ 7ehsetT~default & H99:-;qup-corequp-configqup-memory<= >>txrx adisabledspi@98c0002qcom,geni-spi{@ 7ehsetUV~default & 099:-qup-corequp-config<A >>txrx adisabledserial@98c0002qcom,geni-uart{@ 7ehsetWXYZ~default &099:-qup-corequp-config<A adisabledi2c@9900002qcom,geni-i2c{@ 7ghset[~default & H99:-;qup-corequp-configqup-memory<= >>txrx adisabledspi@9900002qcom,geni-spi{@ 7ghset\]~default & 099:-qup-corequp-config<A >>txrx adisabledserial@9900002qcom,geni-uart{@ 7ghset^_`a~default &099:-qup-corequp-config<A adisabledi2c@9940002qcom,geni-i2c{@@ 7ihsetb~default & H99:-;qup-corequp-configqup-memory<= >>txrx adisabledspi@9940002qcom,geni-spi{@@ 7ihsetcd~default & 099:-qup-corequp-config<A >>txrx adisabledserial@9940002qcom,geni-uart{@@ 7ihsetefgh~default &099:-qup-corequp-config<A adisabledi2c@9980002qcom,geni-i2c{@ 7khseti~default & H99:-;qup-corequp-configqup-memory<= >>txrx adisabledspi@9980002qcom,geni-spi{@ 7khsetjk~default & 099:-qup-corequp-config<A >>txrx adisabledserial@9980002qcom,geni-uart{@ 7khsetlmno~default &099:-qup-corequp-config<A adisabledserial@99c0002qcom,geni-debug-uart{@ 7mhsetpq~default &~099:-qup-corequp-config<Aaokaydma-controller@a00000)2qcom,qcs8300-gpi-dmaqcom,sm6350-gpi-dma{$&%&'()* /6V6 CT adisabledgsgeniqup@ac00002qcom,geni-se-qup{ X 77 hm-ahbs-ahb  /6CT adisabledi2c@a800002qcom,geni-i2c{@ 7qhsetr~default &a H99:.;qup-corequp-configqup-memory<= sstxrx adisabledspi@a800002qcom,geni-spi{@ 7qhsettu~default &a 099:.qup-corequp-config<A sstxrx adisabledserial@a800002qcom,geni-uart{@ 7qhsetvwxy~default &a099:.qup-corequp-config<A adisabledi2c@a840002qcom,geni-i2c{@@ 7shsetz~default &b H99:.;qup-corequp-configqup-memory<= sstxrx adisabledspi@a840002qcom,geni-spi{@@ 7shset{|~default &b 099:.qup-corequp-config<A sstxrx adisabledserial@a840002qcom,geni-uart{@@ 7shset}~~default &b099:.qup-corequp-config<A adisabledi2c@a880002qcom,geni-i2c{@ 7uhset~default &c H99:.;qup-corequp-configqup-memory<= sstxrx adisabledspi@a880002qcom,geni-spi{@ 7uhset~default &c 099:.qup-corequp-config<A sstxrx adisabledserial@a880002qcom,geni-uart{@ 7uhset~default &c099:.qup-corequp-config<A adisabledi2c@a8c0002qcom,geni-i2c{@ 7whset~default &d H99:.;qup-corequp-configqup-memory<= sstxrx adisabledserial@a8c0002qcom,geni-uart{@ 7whset~default &d099:.qup-corequp-config<A adisabledi2c@a900002qcom,geni-i2c{@ 7yhset~default &e H99:.;qup-corequp-configqup-memory<= sstxrx adisabledspi@a900002qcom,geni-spi{@ 7yhset~default &e 099:.qup-corequp-config<A sstxrx adisabledserial@a900002qcom,geni-uart{@ 7yhset~default &e099:.qup-corequp-config<A adisabledi2c@a940002qcom,geni-i2c{@@ 7{hset~default &f H99:.;qup-corequp-configqup-memory<= sstxrx adisabledspi@a940002qcom,geni-spi{@@ 7{hset~default &f 099:.qup-corequp-config<A sstxrx adisabledserial@a940002qcom,geni-uart{@@ 7{hset~default &f099:.qup-corequp-config<A adisabledi2c@a980002qcom,geni-i2c{@ 7}hset~default &C H99:.;qup-corequp-configqup-memory<= sstxrx adisabledspi@a980002qcom,geni-spi{@ 7}hset~default &C 099:.qup-corequp-config<A sstxrx adisabledserial@a980002qcom,geni-uart{@ 7}hset~default &C099:.qup-corequp-config<A adisabledi2c@a9c0002qcom,geni-i2c{@ 7hset~default &} H99:.;qup-corequp-configqup-memory<= sstxrx adisabledspi@a9c0002qcom,geni-spi{@ 7hset~default &} 099:.qup-corequp-config<A sstxrx adisabledserial@a9c0002qcom,geni-uart{@ 7hset~default &}099:.qup-corequp-config<A adisableddma-controller@b00000)2qcom,qcs8300-gpi-dmaqcom,sm6350-gpi-dma{$0&pq /6V6CT adisabledggeniqup@bc00002qcom,geni-se-qup{ X 77 hm-ahbs-ahb  /6CT adisabledi2c@b800002qcom,geni-i2c{@ 7hset~default &> H99:/;qup-corequp-configqup-memory<= txrx adisabledspi@b800002qcom,geni-spi{@ 7hset~default &> 099:/qup-corequp-config<A txrx adisabledserial@b800002qcom,geni-uart{@ 7hset~default &>099:/qup-corequp-config<A adisabledrng@10d20002qcom,qcs8300-trngqcom,trng{ interconnect@14c00002qcom,qcs8300-config-noc{L0&g:interconnect@16800002qcom,qcs8300-system-noc{hP&interconnect@16c00002qcom,qcs8300-aggre1-noc{lp&ginterconnect@17000002qcom,qcs8300-aggre2-noc{p&g;interconnect@17600002qcom,qcs8300-pcie-anoc{v&interconnect@17800002qcom,qcs8300-gpdsp-anoc{xЀ&gUinterconnect@17a00002qcom,qcs8300-mmss-noc{z&gLufs@1d84000,2qcom,qcs8300-ufshcqcom,ufshcjedec,ufs-2.0{@0 & ufsphy7 rst7 /6T0:7ufs-ddrcpu-ufs@ 77774777nhcore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@xhxhaokay #/Ogphy@1d8700022qcom,qcs8300-qmp-ufs-phyqcom,sa8775p-qmp-ufs-phy{p 477hrefref_auxqref7ufsphyAaokayL\gdma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0{@ &$lt/66crypto@1d88000<2qcom,qcs8300-inline-crypto-engineqcom,inline-crypto-engine{؀ 7ghwlock@1f400002qcom,tcsr-mutex{g2syscon@1fc00002qcom,qcs8300-tcsrsyscon{g%remoteproc@3000000,2qcom,qcs8300-adsp-pasqcom,sa8775p-adsp-pas{<n#wdogfatalreadyhandoverstop-ack 4hxo<<lcxlmxstopaokayqcom/qcs8300/adsp.mbnglink-edgen3 3lpassfastrpc 2qcom,fastrpcfastrpcglink-apps-dspadsp+% compute-cb@32qcom,fastrpc-compute-cb{ /6 Tcompute-cb@42qcom,fastrpc-compute-cb{ /6 Tcompute-cb@52qcom,fastrpc-compute-cb{ /6 Tgpr 2qcom,gpr adsp_apps6B service@1 2qcom,q6apm{O`avs/audiomsm/adsp/audio_pdbedais2qcom,q6apm-lpass-daisOdais2qcom,q6apm-dais /6 service@2 2qcom,q6prm{`avs/audiomsm/adsp/audio_pdclock-controller2qcom,q6prm-lpass-clocksJinterconnect@3c400002qcom,qcs8300-lpass-ag-noc{r&stm@4002000 2arm,coresight-stmarm,primecell { (wstm-basestm-stimulus-base  hapb_pclkout-portsportendpointgtpda@4004000"2qcom,coresight-tpdaarm,primecell{@  hapb_pclkin-ports port@1{endpointgout-portsportendpointgtpdm@400f000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgfunnel@4041000+2arm,coresight-dynamic-funnelarm,primecell{  hapb_pclkin-ports port@6{endpointgport@7{endpointgout-portsportendpointgfunnel@4042000+2arm,coresight-dynamic-funnelarm,primecell{   hapb_pclkin-ports port@4{endpointg*port@5{endpointgport@6{endpointgport@7{endpointgout-portsportendpointgfunnel@4045000+2arm,coresight-dynamic-funnelarm,primecell{P  hapb_pclkin-ports port@0{endpointgport@1{endpointgout-portsportendpointgtpdm@4841000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgtpdm@4850000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk@   out-portsportendpointgtpdm@4860000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgtpda@4864000"2qcom,coresight-tpdaarm,primecell{@  hapb_pclkin-ports port@8{endpointgout-portsportendpointgfunnel@4865000+2arm,coresight-dynamic-funnelarm,primecell{P  hapb_pclkin-ports port@0{endpointgport@4{endpointg port@6{endpointgout-portsportendpointgtpdm@4980000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgfunnel@4983000+2arm,coresight-dynamic-funnelarm,primecell{0  hapb_pclkin-portsportendpointgout-portsportendpointgtpdm@4ac0000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgtpda@4ac4000"2qcom,coresight-tpdaarm,primecell{@  hapb_pclkin-ports port@1b{endpointgout-portsportendpointgfunnel@4ac5000+2arm,coresight-dynamic-funnelarm,primecell{P  hapb_pclkin-portsportendpointgout-portsportendpointgtpdm@4ad0000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgtpda@4ad3000"2qcom,coresight-tpdaarm,primecell{0  hapb_pclkin-ports port@13{endpointgport@19{endpointgport@1a{endpointgout-portsportendpointgfunnel@4ad4000+2arm,coresight-dynamic-funnelarm,primecell{@  hapb_pclkin-ports port@0{endpointgport@4{endpointgout-portsportendpointgfunnel@4b04000+2arm,coresight-dynamic-funnelarm,primecell{@  hapb_pclkin-ports port@6{endpointgport@7{endpointgout-portsportendpointgtmc@4b05000 2arm,coresight-tmcarm,primecell{P  hapb_pclkin-portsportendpointgout-portsportendpointgreplicator@4b06000/2arm,coresight-dynamic-replicatorarm,primecell{`  hapb_pclkin-portsportendpointgout-ports port@1{endpointg$tpda@4b08000"2qcom,coresight-tpdaarm,primecell{  hapb_pclkin-ports port@0{endpointgport@1{endpointgport@2{endpointgport@3{endpointgport@4{endpointgout-portsportendpointgtpdm@4b09000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk@ out-portsportendpointgtpdm@4b0a000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk@ out-portsportendpointgtpdm@4b0b000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk@ out-portsportendpointgtpdm@4b0c000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk@ out-portsportendpointgtpdm@4b0d000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgcti@4b13000 2arm,coresight-ctiarm,primecell{0  hapb_pclktpdm@4b80000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgtpda@4b86000"2qcom,coresight-tpdaarm,primecell{`  hapb_pclkin-portsportendpointgout-portsportendpointgfunnel@4b87000+2arm,coresight-dynamic-funnelarm,primecell{p  hapb_pclkin-portsportendpointgout-portsportendpointgcti@4b8b000 2arm,coresight-ctiarm,primecell{  hapb_pclktpdm@4c40000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgtpda@4c44000"2qcom,coresight-tpdaarm,primecell{@  hapb_pclkin-ports port@5{endpointgport@8{endpointgout-portsportendpointgfunnel@4c45000+2arm,coresight-dynamic-funnelarm,primecell{P  hapb_pclkin-ports port@0{endpointgport@4{endpointgout-portsportendpointgtpdm@4c50000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgtpda@4c54000"2qcom,coresight-tpdaarm,primecell{@  hapb_pclkin-ports port@8{endpointgout-portsportendpointgfunnel@4c55000+2arm,coresight-dynamic-funnelarm,primecell{P  hapb_pclkin-portsportendpointgout-portsportendpoint gtpdm@4e00000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk    out-portsportendpoint g tpda@4e03000"2qcom,coresight-tpdaarm,primecell{0  hapb_pclkin-ports port@0{endpoint gport@1{endpoint gport@4{endpoint g out-portsportendpointgfunnel@4e04000+2arm,coresight-dynamic-funnelarm,primecell{@  hapb_pclkin-portsportendpointgout-portsportendpointgtpdm@4e10000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgfunnel@4e12000+2arm,coresight-dynamic-funnelarm,primecell{   hapb_pclkin-portsportendpointgout-portsportendpointg tpdm@4e20000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpointgfunnel@4e22000+2arm,coresight-dynamic-funnelarm,primecell{   hapb_pclkin-portsportendpointgout-portsportendpointg etm@60400002arm,primecell{9  hapb_pclkout-portsportendpointgetm@61400002arm,primecell{9  hapb_pclkout-portsportendpointg etm@62400002arm,primecell{$9  hapb_pclkout-portsportendpointg!etm@63400002arm,primecell{49  hapb_pclkout-portsportendpointg"etm@64400002arm,primecell{D9   hapb_pclkout-portsportendpointg#etm@65400002arm,primecell{T9!  hapb_pclkout-portsportendpointg$etm@66400002arm,primecell{d9"  hapb_pclkout-portsportendpointg%etm@67400002arm,primecell{t9#  hapb_pclkout-portsportendpointg&funnel@6800000+2arm,coresight-dynamic-funnelarm,primecell{  hapb_pclkin-ports port@0{endpointgport@1{endpoint gport@2{endpoint!gport@3{endpoint"gport@4{endpoint#gport@5{endpoint$gport@6{endpoint%gport@7{endpoint&gout-portsportendpoint'g(funnel@6810000+2arm,coresight-dynamic-funnelarm,primecell{  hapb_pclkin-ports port@0{endpoint(g'port@3{endpoint)g2out-portsportendpoint*gcti@682b000 2arm,coresight-ctiarm,primecell{  hapb_pclktpdm@6860000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk@ out-portsportendpoint+g0tpdm@6861000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpoint,g1tpda@6863000"2qcom,coresight-tpdaarm,primecell{0  hapb_pclkin-ports port@0{endpoint-g4port@1{endpoint.g3port@2{endpoint/g5port@3{endpoint0g+port@4{endpoint1g,out-portsportendpoint2g)tpdm@68a0000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpoint3g.tpdm@68b0000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpoint4g-tpdm@68c0000"2qcom,coresight-tpdmarm,primecell{  hapb_pclk  out-portsportendpoint5g/cti@68e0000 2arm,coresight-ctiarm,primecell{  hapb_pclkcti@68f0000 2arm,coresight-ctiarm,primecell{  hapb_pclkcti@6900000 2arm,coresight-ctiarm,primecell{  hapb_pclkmmc@87c4000%2qcom,qcs8300-sdhciqcom,sdhci-msm-v5 {|@|P whccqhci& hc_irqpwr_irq 774hifacecorexo7 <6 /60:1sdhc-ddrcpu-sdhc dh)Taokayt768~defaultsleep@JWfu9opp-table2operating-points-v2g6opp-50000000=opp-100000000:opp-200000000 'opp-384000000`phy@890400012qcom,qcs8300-usb-hs-phyqcom,usb-snps-hs-7nm-phy{@ 4href7Aaokay\;<=gGphy@890600012qcom,qcs8300-usb-hs-phyqcom,usb-snps-hs-7nm-phy{` 4href7Aaokay\;<=gIphy@89070002qcom,qcs8300-qmp-usb3-uni-phy{p   7777hauxrefcom_auxpipe77 phyphy_phy7Jusb3_prim_phy_pipe_clk_srcAaokayL;\gHphy@8909000:2qcom,qcs8300-dwmac-sgmii-phyqcom,sa8775p-dwmac-sgmii-phy{ 7 hsgmi_refAaokayQgXgpu@3d000002qcom,adreno-623.0qcom,adreno0{#wkgsl_3d0_reg_memorycx_memcx_dbgc &,/> > ?@gfx-mem A speed_binaokayzap-shaderBqcom/qcs8300/a623_zap.mbnopp-table2operating-points-v2g?opp-8770000004E@(2opp-780000000.}( 2opp-599000000#(|c2opp-479000000(P$2gmu@3d6a000&2qcom,adreno-gmu-623.0qcom,adreno-gmu0{֠@ )wgmursccgmu_pdc&01hfigmu0 CC 770CChgmucxoaximemnocahbhubCCcxgx /> Dg@opp-table2operating-points-v2gDopp-500000000e(clock-controller@3d900002qcom,qcs8300-gpucc{ 47-7.8hbi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_srcJ1gCiommu@3da0000A2qcom,qcs8300-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-500{CP&8 7071CCCCChgcc_gpu_memnoc_gfx_clkgcc_gpu_snoc_dvm_gfx_clkgpu_cc_ahb_clkgpu_cc_hlos1_vote_gpu_smmu_clkgpu_cc_cx_gmu_clkgpu_cc_hub_cx_int_clkgpu_cc_hub_aon_clkCTg>pmu@9091000/2qcom,qcs8300-llcc-bwmonqcom,sc7280-llcc-bwmon{  &lEopp-table2operating-points-v2gEopp-0 opp-1>opp-2popp-3'(opp-4,hopp-5Zopp-6ci8opp-7yӀopp-8Aopp-9pmu@90b5400)2qcom,qcs8300-cpu-bwmonqcom,sdm845-bwmon{ T &EFopp-table2operating-points-v2gFopp-0opp-1opp-29`opp-3/(pmu@90b6400)2qcom,qcs8300-cpu-bwmonqcom,sdm845-bwmon{ d &EFinterconnect@90e00002qcom,qcs8300-dc-noc{ P&interconnect@91000002qcom,qcs8300-gem-noc{ p&gsystem-cache-controller@92000002qcom,qcs8300-llccP{  0 @ P @wllcc0_basellcc1_basellcc2_basellcc3_basellcc_broadcast_base &Fusb@a600000!2qcom,qcs8300-dwc3qcom,snps-dwc3{ `( 777 77#hcfg_noccoreifacesleepmock_utmic77s$ Tn$ Edwc_usb3pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq770:9usb-ddrapps-usb /6GHusb2-phyusb3-phyaokay peripheralusb@a400000!2qcom,qcs8300-dwc3qcom,snps-dwc3{ @( 77777#hcfg_noccoreifacesleepmock_utmic77s$'Hn  :dwc_usb3pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irq77 0:8usb-ddrapps-usb /6 I usb2-phy high-speed&aokayhostvideo-codec@aa000002qcom,qcs8300-iris{  & JJ<<venusvcodec0mxcmmcxK 7JJhifacecorevcodec0_core0::Lcpu-cfgvideo-memM7bus/66Taokayopp-table2operating-points-v2gKopp-366000000з''opp-444000000vopp-533000000@NNopp-560000000!`OOclock-controller@abf00002qcom,qcs8300-videocc{  7445<J1gJclock-controller@ade00002qcom,qcs8300-camcc{  7445<J1clock-controller@af000002qcom,sa8775p-dispcc0{ < 7445<J1interrupt-controller@b2200002qcom,qcs8300-pdcqcom,pdc { "dC((672;8>v@BFI v8|a~YCz dgpower-management@c300000$2qcom,qcs8300-aoss-qmpqcom,aoss-qmp{ 0n3 3Jgsram@c3f00002qcom,rpmh-stats{ ?spmi@c4400002qcom,spmi-pmic-arbP{ D ``p @`wcorechnlsobsrvrintrcnfgSl n periph_irq pmic@02qcom,pmm8654auqcom,spmi-pmic{ rtc@61002qcom,pmk8350-rtc{ab wrtcalarm&b`gpio@8800#2qcom,pmm8654au-gpioqcom,spmi-gpio{oP gPpmic@22qcom,pmm8654auqcom,spmi-pmic{ gpio@8800#2qcom,pmm8654au-gpioqcom,spmi-gpio{oQ gQusb2-en-stategpio7normalgapinctrl@f1000002qcom,qcs8300-tlmm{0 &oghs0-mi2s-active-state gpio106gpio107gpio108gpio109 hs0_mi2smi2s1-active-statedata0-pinsgpio100 mi2s1_data0data1-pinsgpio101 mi2s1_data1sclk-pinsgpio98 mi2s1_sckws-pinsgpio99 mi2s1_wsqup-i2c0-data-clk-stategpio17gpio18 qup0_se0g8qup-i2c1-data-clk-stategpio19gpio20 qup0_se1gFqup-i2c2-data-clk-stategpio33gpio34 qup0_se2gMqup-i2c3-data-clk-stategpio25gpio26 qup0_se3gTqup-i2c4-data-clk-stategpio29gpio30 qup0_se4g[qup-i2c5-data-clk-stategpio21gpio22 qup0_se5gbqup-i2c6-data-clk-stategpio80gpio81 qup0_se6giqup-i2c8-data-clk-stategpio37gpio38 qup1_se0grqup-i2c9-data-clk-stategpio39gpio40 qup1_se1gzqup-i2c10-data-clk-stategpio84gpio85 qup1_se2gqup-i2c11-data-clk-stategpio41gpio42 qup1_se3gqup-i2c12-data-clk-stategpio45gpio46 qup1_se4gqup-i2c13-data-clk-stategpio49gpio50 qup1_se5gqup-i2c14-data-clk-stategpio89gpio90 qup1_se6gqup-i2c15-data-clk-stategpio91gpio92 qup1_se7gqup-i2c16-data-clk-stategpio10gpio11 qup2_se0gqup-spi0-data-clk-stategpio17gpio18gpio19 qup0_se0g?qup-spi0-cs-stategpio20 qup0_se0g@qup-spi0-cs-gpio-stategpio20gpioqup-spi1-data-clk-stategpio19gpio20gpio17 qup0_se1gGqup-spi1-cs-stategpio18 qup0_se1gHqup-spi1-cs-gpio-stategpio18gpioqup-spi2-data-clk-stategpio33gpio34gpio35 qup0_se2gNqup-spi2-cs-stategpio36 qup0_se2gOqup-spi2-cs-gpio-stategpio36gpioqup-spi3-data-clk-stategpio25gpio26gpio27 qup0_se3gUqup-spi3-cs-stategpio28 qup0_se3gVqup-spi3-cs-gpio-stategpio28gpioqup-spi4-data-clk-stategpio29gpio30gpio31 qup0_se4g\qup-spi4-cs-stategpio32 qup0_se4g]qup-spi4-cs-gpio-stategpio32gpioqup-spi5-data-clk-stategpio21gpio22gpio23 qup0_se5gcqup-spi5-cs-stategpio24 qup0_se5gdqup-spi5-cs-gpio-stategpio24gpioqup-spi6-data-clk-stategpio80gpio81gpio82 qup0_se6gjqup-spi6-cs-stategpio83 qup0_se6gkqup-spi6-cs-gpio-stategpio83gpioqup-spi8-data-clk-stategpio37gpio38gpio39 qup1_se0gtqup-spi8-cs-stategpio40 qup1_se0guqup-spi8-cs-gpio-stategpio40gpioqup-spi9-data-clk-stategpio39gpio40gpio37 qup1_se1g{qup-spi9-cs-stategpio38 qup1_se1g|qup-spi9-cs-gpio-stategpio38gpioqup-spi10-data-clk-stategpio84gpio85gpio86 qup1_se2gqup-spi10-cs-stategpio87 qup1_se2gqup-spi10-cs-gpio-stategpio87gpioqup-spi12-data-clk-stategpio45gpio46gpio47 qup1_se4gqup-spi12-cs-stategpio48 qup1_se4gqup-spi12-cs-gpio-stategpio48gpioqup-spi13-data-clk-stategpio49gpio50gpio51 qup1_se5gqup-spi13-cs-stategpio52 qup1_se5gqup-spi13-cs-gpio-stategpio52gpioqup-spi14-data-clk-stategpio89gpio90gpio91 qup1_se6gqup-spi14-cs-stategpio92 qup1_se6gqup-spi14-cs-gpio-stategpio92gpioqup-spi15-data-clk-stategpio91gpio92gpio89 qup1_se7gqup-spi15-cs-stategpio90 qup1_se7gqup-spi15-cs-gpio-stategpio90gpioqup-spi16-data-clk-stategpio10gpio11gpio12 qup2_se0gqup-spi16-cs-stategpio13 qup2_se0gqup-spi16-cs-gpio-stategpio13gpioqup-uart0-cts-stategpio17 qup0_se0gBqup-uart0-rts-stategpio18 qup0_se0gCqup-uart0-tx-stategpio19 qup0_se0gDqup-uart0-rx-stategpio20 qup0_se0gEqup-uart1-cts-stategpio19 qup0_se1gIqup-uart1-rts-stategpio20 qup0_se1gJqup-uart1-tx-stategpio17 qup0_se1gKqup-uart1-rx-stategpio18 qup0_se1gLqup-uart2-cts-stategpio33 qup0_se2gPqup-uart2-rts-stategpio34 qup0_se2gQqup-uart2-tx-stategpio35 qup0_se2gRqup-uart2-rx-stategpio36 qup0_se2gSqup-uart3-cts-stategpio25 qup0_se3gWqup-uart3-rts-stategpio26 qup0_se3gXqup-uart3-tx-stategpio27 qup0_se3gYqup-uart3-rx-stategpio28 qup0_se3gZqup-uart4-cts-stategpio29 qup0_se4g^qup-uart4-rts-stategpio30 qup0_se4g_qup-uart4-tx-stategpio31 qup0_se4g`qup-uart4-rx-stategpio32 qup0_se4gaqup-uart5-cts-stategpio21 qup0_se5gequp-uart5-rts-stategpio22 qup0_se5gfqup-uart5-tx-stategpio23 qup0_se5ggqup-uart5-rx-stategpio23 qup0_se5ghqup-uart6-cts-stategpio80 qup0_se6glqup-uart6-rts-stategpio81 qup0_se6gmqup-uart6-tx-stategpio82 qup0_se6gnqup-uart6-rx-stategpio83 qup0_se6goqup-uart7-tx-stategpio43 qup0_se7gpqup-uart7-rx-stategpio44 qup0_se7gqqup-uart8-cts-stategpio37 qup1_se0gvqup-uart8-rts-stategpio38 qup1_se0gwqup-uart8-tx-stategpio39 qup1_se0gxqup-uart8-rx-stategpio40 qup1_se0gyqup-uart9-cts-stategpio39 qup1_se1g}qup-uart9-rts-stategpio40 qup1_se1g~qup-uart9-tx-stategpio37 qup1_se1gqup-uart9-rx-stategpio38 qup1_se1gqup-uart10-cts-stategpio84 qup1_se2gqup-uart10-rts-stategpio84 qup1_se2gqup-uart10-tx-stategpio85 qup1_se2gqup-uart10-rx-stategpio87 qup1_se2gqup-uart11-tx-stategpio41 qup1_se3gqup-uart11-rx-stategpio42 qup1_se3gqup-uart12-cts-stategpio45 qup1_se4gqup-uart12-rts-stategpio46 qup1_se4gqup-uart12-tx-stategpio47 qup1_se4gqup-uart12-rx-stategpio48 qup1_se4gqup-uart13-cts-stategpio49 qup1_se5gqup-uart13-rts-stategpio50 qup1_se5gqup-uart13-tx-stategpio51 qup1_se5gqup-uart13-rx-stategpio52 qup1_se5gqup-uart14-cts-stategpio89 qup1_se6gqup-uart14-rts-stategpio90 qup1_se6gqup-uart14-tx-stategpio91 qup1_se6gqup-uart14-rx-stategpio92 qup1_se6gqup-uart15-cts-stategpio91 qup1_se7gqup-uart15-rts-stategpio92 qup1_se7gqup-uart15-tx-stategpio89 qup1_se7gqup-uart15-rx-stategpio90 qup1_se7gqup-uart16-cts-stategpio10 qup2_se0gqup-uart16-rts-stategpio11 qup2_se0gqup-uart16-tx-stategpio12 qup2_se0gqup-uart16-rx-stategpio13 qup2_se0gsdc1-on-stateg7clk-pins sdc1_clkcmd-pins sdc1_cmd data-pins sdc1_data rclk-pins sdc1_rclksdc1-off-stateg8clk-pins sdc1_clk cmd-pins sdc1_cmd data-pins sdc1_data rclk-pins sdc1_rclk ethernet0-default-stategZethernet0-mdc-pinsgpio5 emac0_mdcethernet0-mdio-pinsgpio6 emac0_mdiosram@146d8000$2qcom,qcs8300-imemsysconsimple-mfd{mXm pil-reloc@94c2qcom,pil-reloc-info{ Liommu@1500000002qcom,qcs8300-smmu-500qcom,smmu-500arm,mmu-500{CPT&wxbcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYg6iommu@1520000002qcom,qcs8300-smmu-500qcom,smmu-500arm,mmu-500{ CPT&uvwx4676HIJKLMNOPQ"#$%&'()*+,-.DEFGVWXOinterrupt-controller@17a00000 2arm,gic-v3 { &   +gwatchdog@17c10000$2qcom,apss-wdt-qcs8300qcom,kpss-wdt{ 5 &timer@17c200002arm,armv7-timer-mem{X  frame@17c21000{  @&frame@17c23000{0 @ &  adisabledframe@17c25000{P @ &  adisabledframe@17c27000{p @ &  adisabledframe@17c29000{ @ &  adisabledframe@17c2b000{° @ &  adisabledframe@17c2d000{ @ & adisabledrsc@182000002qcom,rpmh-rsc0{ !"wdrv-0drv-1drv-2$&. apps_rsc M  ] ibcm-voter2qcom,bcm-voterg&clock-controller2qcom,sa8775p-rpmh-clkJ Rhxog4power-controller2qcom,qcs8300-rpmhpd1Sg<opp-table2operating-points-v2gSopp-0(opp-1(0opp-2(@g=opp-3(g:opp-4(g'opp-5(gopp-6(@opp-7(Popp-8(gNopp-9(gOregulators-02qcom,pmm8654au-rpmh-regulators yasmps4 vreg_s4a w@ w@ g9smps9 vreg_s9a @ @ ldo3 vreg_l3a O O   ldo4 vreg_l4a m    gldo5 vreg_l5a O O   gldo6 vreg_l6a m    ldo7 vreg_l7a m    g;ldo8 vreg_l8a &5@ -*   gldo9 vreg_l9a -Q .   g=regulators-12qcom,pmm8654au-rpmh-regulators ycsmps5 vreg_s5c ؀ ؀ ldo1 vreg_l1c      ldo2 vreg_l2c  @   ldo4 vreg_l4c O O   gldo6 vreg_l6c w@ w@   ldo7 vreg_l7c w@ w@   g<ldo8 vreg_l8c w@ w@   ldo9 vreg_l9c w@ w@   interconnect@1859000072qcom,qcs8300-epss-l3qcom,sa8775p-epss-l3qcom,epss-l3{Y 47 hxoalternategcpufreq@18591000,2qcom,qcs8300-cpufreq-epssqcom,cpufreq-epss0{YY0Y@'wfreq-domain0freq-domain1freq-domain2$& V$dcvsh-irq-0dcvsh-irq-1dcvsh-irq-2 47 hxoalternate ginterconnect@1859200072qcom,qcs8300-epss-l3qcom,sa8775p-epss-l3qcom,epss-l3{Y  47 hxoalternategremoteproc@20c00000/2qcom,qcs8300-gpdsp-pasqcom,sa8775p-gpdsp0-pas{ @nTTTT#wdogfatalreadyhandoverstop-ack 4hxo<< cxmxcU: VWstopaokayqcom/qcs8300/gpdsp0.mbnglink-edgen3 3gpdspethernet@23040000(2qcom,qcs8300-ethqosqcom,sa8775p-ethqos {##`wstmmacethrgmii& macirqsfty  77!77hstmmacethpclkptp_refphyaux7Xserdes /6 T  )  2@ @Paokay N2500base-x WYtZ~default b[ u\ mdio2snps,dwmac-mdio phy@82ethernet-phy-id31c3.1c33{ oethernet-phy n  * pgYrx-queues-config  g[queue0    queue1   &queue2 5  Hqueue3 5   tx-queues-config Xg\queue0 queue1 queue2 5 n ~  queue3 5 n ~  interconnect@260c00002qcom,qcs8300-nspa-noc{& `&g^remoteproc@26300000-2qcom,qcs8300-cdsp-pasqcom,sa8775p-cdsp0-pas{&0@nB]]]]#wdogfatalreadyhandoverstop-ack 4hxo<< < cxmxcnsp^_`stopaokayqcom/qcs8300/cdsp0.mbnglink-edgen3 3cdspfastrpc 2qcom,fastrpcfastrpcglink-apps-dspcdsp compute-cb@12qcom,fastrpc-compute-cb{/6@6aTcompute-cb@22qcom,fastrpc-compute-cb{/6@6bTcompute-cb@32qcom,fastrpc-compute-cb{/6@6cTcompute-cb@42qcom,fastrpc-compute-cb{/6@6dTtimer2arm,armv8-timer0&   aliases$ /soc@0/geniqup@9c0000/serial@99c000 /soc@0/mmc@87c4000chosen serial0:115200n8regulator-usb2-vbus2regulator-fixed USB2_VBUS Qta~default   interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-type#clock-cellsclock-frequencyphandledevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namescapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domainoperating-points-v2interconnectscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-peak-kBpsremote-endpointqcom,dload-mode#interconnect-cellsqcom,bcm-votersrequired-oppsinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksinterrupts-extendedmboxesqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-nameinterrupt-controller#interrupt-cells#qcom,smem-state-cells#reset-cellsclocks#mbox-cellsbits#dma-cellsiommusdma-channelsdma-channel-maskdma-coherentstatusclock-namespinctrl-0pinctrl-namesinterconnect-namesdmasdma-namesphysphy-nameslanes-per-directionresetsreset-namesfreq-table-hzqcom,icereset-gpiosvcc-supplyvcc-max-microampvccq-supplyvccq-max-microamp#phy-cellsvdda-phy-supplyvdda-pll-supplyqcom,eeqcom,controlled-remotelynum-channelsqcom,num-ees#hwlock-cellsinterrupt-namesmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesfirmware-namelabelqcom,glink-channelsqcom,vmidsqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainreg-namesqcom,cmb-element-bitsqcom,cmb-msrs-numqcom,dsb-element-bitsqcom,dsb-msrs-numarm,coresight-loses-context-with-cpuqcom,skip-power-upqcom,dll-configqcom,ddr-configsupports-cqepinctrl-1bus-widthmmc-ddr-1_8vmmc-hs200-1_8vmmc-hs400-1_8vmmc-hs400-enhanced-strobevmmc-supplyvqmmc-supplynon-removableno-sdno-sdiovdda18-supplyvdda33-supplyclock-output-namesqcom,gmu#cooling-cellsnvmem-cellsnvmem-cell-namesopp-levelopp-supported-hw#iommu-cells#global-interruptsassigned-clocksassigned-clock-ratessnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirkwakeup-sourcedr_modemaximum-speedqcom,select-utmi-as-pipe-clkqcom,pdc-rangesqcom,channelallow-set-timegpio-controllergpio-ranges#gpio-cellspinsfunctionoutput-enablepower-sourcewakeup-parentdrive-strengthbias-disablebias-pull-upbias-pull-downbias-bus-hold#redistributor-regionsredistributor-strideframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allow-set-loadregulator-allowed-modes#freq-domain-cellssnps,tsosnps,pblrx-fifo-depthtx-fifo-depthphy-modephy-handlesnps,mtl-rx-configsnps,mtl-tx-configsnps,ps-speedreset-assert-usreset-deassert-ussnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,route-upsnps,prioritysnps,route-ptpsnps,avb-algorithmsnps,route-avcpsnps,tx-queues-to-usesnps,send_slopesnps,idle_slopesnps,high_creditsnps,low_creditserial0mmc0stdout-pathgpioenable-active-highregulator-always-on