8(il.radxa,nio-12lmediatek,mt8395mediatek,mt8195 +7Radxa NIO 12L =embeddedaliasesJ/soc/dp-intf@1c015000S/soc/dp-intf@1c113000\/soc/mailbox@10320000a/soc/mailbox@10330000f/soc/hdr-engine@1c114000m/soc/mutex@1c016000t/soc/mutex@1c101000{/soc/vpp-merge@1c10c000/soc/vpp-merge@1c10d000/soc/vpp-merge@1c10e000/soc/vpp-merge@1c10f000/soc/vpp-merge@1c110000/soc/dma-controller@1c104000/soc/dma-controller@1c105000/soc/dma-controller@1c106000/soc/dma-controller@1c107000/soc/dma-controller@1c108000/soc/dma-controller@1c109000/soc/dma-controller@1c10a000/soc/dma-controller@1c10b000/soc/i2c@11e02000/soc/i2c@11e03000/soc/i2c@11e04000/soc/i2c@11e00000 /soc/i2c@11e01000/soc/ethernet@11021000/soc/serial@11001100!/soc/serial@11001200)/soc/spi@11010000./soc/spi@11012000cpus+cpu@03cpuarm,cortex-a55?CpsciQeec3@u4@@ cpu@1003cpuarm,cortex-a55?CpsciQeec3@u4@@ cpu@2003cpuarm,cortex-a55?CpsciQeec3@u4@@ cpu@3003cpuarm,cortex-a55?CpsciQeec3@u4@@cpu@4003cpuarm,cortex-a78?CpsciQefu@@  cpu@5003cpuarm,cortex-a78?CpsciQefu@@  cpu@6003cpuarm,cortex-a78?CpsciQefu@@  cpu@7003cpuarm,cortex-a78?CpsciQefu@@  cpu-mapcluster0core0# core1# core2# core3#core4#core5#core6#core7#idle-states'pscicpu-retention-larm,idle-state4K\2m_}Dcpu-retention-barm,idle-state4K\-m}cpu-off-larm,idle-state4K\7m}Hcpu-off-barm,idle-state4K\2m}l2-cache0cache@l2-cache1cache@ l3-cachecache @dsu-pmu arm,dsu-pmu  faildmic-codec dmic-codec2mt8195-soundokaymediatek,mt8195_mt6359 7mt8395-evkdefault,HeadphoneHeadphone LHeadphoneHeadphone Rheadphone-dai-link "DL_SRC_BEcodec,fixed-factor-clock-13mfixed-factor-clock6CJT_clk13m/oscillator-26m fixed-clock6e_clk26moscillator-32k fixed-clock6e_clk32kperformance-controller@11bc10mediatek,cpufreq-hw ? 0 ropp-table-gpuoperating-points-v2|opp-390000000> hopp-410000000p opp-431000000 opp-4730000001h@ <opp-515000000F <opp-556000000!# Ҧopp-598000000# opp-640000000&% opp-670000000'c opp-700000000)' Lopp-730000000+ }opp-760000000-L `opp-790000000/q 4opp-82000000005 opp-8500000002 @opp-8800000004s qpmu-a55arm,cortex-a55-pmu pmu-a78arm,cortex-a78-pmu psci arm,psci-1.0Jsmctimerarm,armv8-timer @   soc+ simple-businterrupt-controller@c000000 arm,gic-v3  ?    ppi-partitionsinterrupt-partition-0 interrupt-partition-1syscon@10000000 mediatek,mt8195-topckgensyscon?6syscon@10001000#mediatek,mt8195-infracfg_aosyscon?6syscon@10003000mediatek,mt8195-pericfgsyscon?06Hpinctrl@10005000mediatek,mt8195-pinctrl?PBiocfg0iocfg_bmiocfg_bliocfg_briocfg_lmiocfg_rbiocfg_tleint+7Caudio-default-pinspins-cmd-datgFEGHIJKdsi0-backlight-pinspins-backlight-engkneth-default-pinsDpins-ccgUVWXzpins-mdiogYZpins-powerg[\npins-rstg]pins-rxdgQRSTpins-txdgMNOPzeth-sleep-pinsEpins-ccgUVWXpins-mdiogYZpins-rxdgQRSTpins-txdgMNOPgpio-keys-pinspinsgji2c2-pinsjpins-busg  zi2c4-pinsmpins-busgi2c6-pinscpinsgmmc0-default-pinsMpins-clkgzfzpins-cmd-dat$g~}|{wvutyezpins-rstgxezmmc0-uhs-pinsNpins-clkgzfzpins-cmd-dat$g~}|{wvutyezpins-dsgfzpins-rstgxezmmc1-default-pinsQpins-clkgofzpins-cmd-datgnpqrsezmmc1-detect-pinsRpins-insertgmt6360-pinsdpins-irqgdepanel-pinspins-rstglpcie0-default-pins^pins-bus gpcie1-default-pinsapins-bus gpwm0-pinspins-disp-pwmgaspi1-default-pins>pins-busgspi2-default-pins?pins-busgtouch-pinspins-touch-intgpins-touch-rstgnuart0-pins9pins-busgbcuart1-pins:pins-busgfgusb3p0-default-pinsIpins-vbusg?usb2p0-default-pinsYpins-iddiggpins-vbusgwifi-vreg-pinspins-wifi-pmu-engAnpins-wifi-vreg-engCsyscon@10006000)mediatek,mt8195-scpsyssysconsimple-mfd?`power-controller!mediatek,mt8195-power-controller+2power-domain@8?+power-domain@9? Cmfgalt+ power-domain@10? power-domain@11? power-domain@12? power-domain@13? power-domain@14?power-domain@15?C @AK! ! !!!!!!!!!!!!!!!!! vppsysvppsys1vppsys2vppsys3vppsys4vppsys5vppsys6vppsys7vppsys0-0vppsys0-1vppsys0-2vppsys0-3vppsys0-4vppsys0-5vppsys0-6vppsys0-7vppsys0-8vppsys0-9vppsys0-10vppsys0-11vppsys0-12vppsys0-13vppsys0-14vppsys0-15vppsys0-16vppsys0-17vppsys0-18+power-domain@16?8C"$"%"&"'"(")Dvdosys0vdosys0-0vdosys0-1vdosys0-2vdosys0-3vdosys0-4vdosys0-5+power-domain@17?C##vppsys1vppsys1-0vppsys1-1power-domain@22? C$$$$$wepsys-0wepsys-1wepsys-2wepsys-3power-domain@23?C%vdec0-0+power-domain@24?C&vdec1-0power-domain@25?C'vdec2-0power-domain@26?C( venc0-larb+power-domain@27?C) venc1-larbpower-domain@18? C***&vdosys1vdosys1-0vdosys1-1vdosys1-2+power-domain@19?power-domain@20?power-domain@21?CQhdmi_txpower-domain@28?C++  img-0img-1+power-domain@29?power-domain@30?C+,ipeipe-0ipe-1power-domain@31?(C-----cam-0cam-1cam-2cam-3cam-4+power-domain@32? power-domain@33?!power-domain@34?"power-domain@0?power-domain@1?power-domain@2?power-domain@3?power-domain@4?C57csi_rx_topcsi_rx_top1power-domain@5?C. etherpower-domain@6?CXn adspadsp1+power-domain@7? Cg"n2audioaudio1audio2audio3watchdog@10007000mediatek,mt8195-wdt0?p7syscon@1000c000"mediatek,mt8195-apmixedsyssyscon?6timer@10017000,mediatek,mt8195-timermediatek,mt6765-timer?p C/pwrap@10024000mediatek,mt8195-pwrapsyscon?@pwrapC spiwrapH$Xpmicmediatek,mt6359o adcmediatek,mt6359-auxadcaudio-codecmediatek,mt6359-codecregulatorsmediatek,mt6359-regulatorbuck_vs1vs1 5!buck_vgpu11vgpu117 *buck_vmodemvmodem*buck_vpuvpu7 *buck_vcorevcore  *buck_vs2vs2 5jbuck_vpavpa 7,buck_vproc2vproc27L *buck_vproc1vproc17L *buck_vcore_sshub vcore_sshub7buck_vgpu11_sshub vgpu11_sshub7ldo_vaud18vaud18w@w@ldo_vsim1vsim1/M`ldo_vibrvibrO2Zkldo_vrf12vrf12 ldo_vusbvusb--Jldo_vsram_proc2 vsram_proc2 Lldo_vio18vio18ldo_vcamiovcamioldo_vcn18vcn18w@w@ldo_vfe28vfe28**xldo_vcn13vcn13  ldo_vcn33_1_bt vcn33_1_bt*5gldo_vcn33_1_wifi vcn33_1_wifi*5gldo_vaux18vaux18w@w@ldo_vsram_others vsram_others q q ldo_vefusevefuseldo_vxo22vxo22w@!ldo_vrfckvrfck`ldo_vrfck_1vrfckjldo_vbif28vbif28**ldo_vio28vio28*2Zldo_vemcvemc,@ 2Zldo_vemc_1vemc&%2ZOldo_vcn33_2_bt vcn33_2_bt2Z2Zldo_vcn33_2_wifi vcn33_2_wifi*5gldo_va12va12O ldo_va09va09 5Oldo_vrf18vrf18Pldo_vsram_md vsram_md *ldo_vufsvufsPldo_vm18vm18ldo_vbbckvbbckOldo_vsram_proc1 vsram_proc1 Lldo_vsim2vsim2/M`ldo_vsram_others_sshubvsram_others_sshub rtcmediatek,mt6358-rtckeysmediatek,mt6359-keysB[power-keynt}homenfspmi@10027000mediatek,mt8195-spmi ?p pmifspmimstCE(pmif_sys_ckpmif_tmr_ckspmimst_clk_muxH$X+pmic@6mediatek,mt6315-regulator?regulatorsvbuck1Vbcpu7 * pmic@7mediatek,mt6315-regulator?regulatorsvbuck1Vgpu7 *infra-iommu@10315000mediatek,mt8195-iommu-infra?1PPP[mailbox@10320000mediatek,mt8195-gce?2@Cmailbox@10330000mediatek,mt8195-gce?3@C}scp@10500000mediatek,mt8195-scp0?Prpsramcfgl1tcmokay0mediatek/mt8195/scp.img~clock-controller@10720000mediatek,mt8195-scp_adsp?r61dsp@10803000mediatek,mt8195-dsp ?0 cfgsram,CXn1#Kadsp_selclk26m_ckaudio_local_busmainpll_d7_d2scp_adsp_audiodspaudio_h2rxtx34okay56mailbox@10816000mediatek,mt8195-adsp-mbox?`3mailbox@10817000mediatek,mt8195-adsp-mbox?p4mt8195-afe-pcm@10890000mediatek,mt8195-audio?267 audiosysCg"#neabcd21clk26mapll1_ckapll2_ckapll12_div0apll12_div1apll12_div2apll12_div3apll12_div9a1sys_hp_selaud_intbus_selaudio_h_selaudio_local_bus_seldptx_m_seli2so1_m_seli2so2_m_seli2si1_m_seli2si2_m_selinfra_ao_audio_26m_bscp_adsp_audiodspokay8serial@11001100*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbusokay9default serial@11001200*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbusokay:default serial@11001300*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbus disabled serial@11001400*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbus disabled serial@11001500*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbus disabled serial@11001600*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbus disabledauxadc@11002000.mediatek,mt8195-auxadcmediatek,mt8173-auxadc? Cmain disabledsyscon@11003000"mediatek,mt8195-pericfg_aosyscon?06.spi@1100a000(mediatek,mt8195-spimediatek,mt6765-spi+?Cparent-clksel-clkspi-clk disabledthermal-sensor@1100b000mediatek,mt8195-lvts-ap? C;<$lvts-calib-data-1lvts-calib-data-2"svs@1100bc00mediatek,mt8195-svs?Cmain=;(svs-calibration-datat-calibration-datasvs_rstpwm@1100e0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm?28C*0mainmm disabledpwm@1100f0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm?8C+Nmainmm disabledspi@11010000(mediatek,mt8195-spimediatek,mt6765-spi+?C3parent-clksel-clkspi-clkokay>defaultCspi@11012000(mediatek,mt8195-spimediatek,mt6765-spi+? C4parent-clksel-clkspi-clkokay?defaultCspi@11013000(mediatek,mt8195-spimediatek,mt6765-spi+?0C5parent-clksel-clkspi-clk disabledspi@11018000(mediatek,mt8195-spimediatek,mt6765-spi+?C<parent-clksel-clkspi-clk disabledspi@11019000(mediatek,mt8195-spimediatek,mt6765-spi+?C=parent-clksel-clkspi-clk disabledspi@1101d000mediatek,mt8195-spi-slave?CRspiHX disabledspi@1101e000mediatek,mt8195-spi-slave?CSspiHX disabledethernet@11021000&mediatek,mt8195-gmacsnps,dwmac-5.10a?@Wmacirq.axiapbmac_mainptp_refrmii_internalmac_cg0C..RST. HRSTX2gx@ABokay rgmii-rxidCdefaultsleepDE ] %N mdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916?Cstmmac-axi-config:JZ@rx-queues-configdzAqueue0queue1queue2queue3tx-queues-configBqueue0queue1queue2queue3usb@11201000#mediatek,mt8195-mtu3mediatek,mtu3 ? - > macippc ?+C/Bsys_ckref_ckmcu_ckFG} HgokaydefaultI host - =Jusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci?macH,-X$C/B$sys_ckref_ckmcu_ckdma_ckxhci_ckokay KKportendpoint WLgmmc@11230000(mediatek,mt8195-mmcmediatek,mt8183-mmc ?#Csourcehclksource_cgokaydefaultstate_uhsMN g q  L        O Pmmc@11240000(mediatek,mt8195-mmcmediatek,mt8183-mmc ?$C$sourcehclksource_cgHXokaydefaultstate_uhsQRQ g q      % 2 S Tmmc@11250000(mediatek,mt8195-mmcmediatek,mt8183-mmc ?%C Isourcehclksource_cgH X disabledufshci@11270000mediatek,mt8195-ufshci?'#U@C?@A678Z]Xufsufs_aesufs_tickunipro_sysclkunipro_tickunipro_mp_bclkufs_tx_symbolufs_mem_sub@ @ Nokay gO rP thermal-sensor@11278000mediatek,mt8195-lvts-mcu?'C;<$lvts-calib-data-1lvts-calib-data-2"usb@11290000'mediatek,mt8195-xhcimediatek,mtk-xhci ?))> macippcVH./X$C..$sys_ckref_ckmcu_ckdma_ckxhci_ck Hh}okay  =J KW !usb@112a1000#mediatek,mt8195-mtu3mediatek,mtu3 ?*-*> macippc*?+H0XC..sys_ckref_ckmcu_ckX} HiokaydefaultY =J"usb@0'mediatek,mt8195-xhcimediatek,mtk-xhci?macH1XC.sys_ckokay KW#usb@112b1000#mediatek,mt8195-mtu3mediatek,mtu3 ?+-+> macippc+?+H2XC.. sys_ckref_ckmcu_ckZ} Hj disabled$usb@0'mediatek,mt8195-xhcimediatek,mtk-xhci?macH3XC. sys_ck disabled%pcie@112f0000*mediatek,mt8195-pciemediatek,mt8192-pcie3pci+?/@ pcie-mac 8  [ 0CV#&+K./pl_250mtl_26mtl_96mtl_32kperi_26mperi_memHGX\ pcie-phy2 ` ]]]]okaydefault^&interrupt-controller]pcie@112f8000*mediatek,mt8195-pciemediatek,mt8192-pcie3pci+?/@ pcie-mac 8$$ $ $  [ (CWXQ./pl_250mtl_26mtl_96mtl_32kperi_26mperi_memHHX_ pcie-phy2 ` ````okaydefaulta'interrupt-controller`spi@1132c000(mediatek,mt8195-normediatek,mt8173-nor?29Co.. spisfaxi+ disabled(efuse@11c10000%mediatek,mt8195-efusemediatek,efuse?+)usb3-tx-imp@184,1? susb3-rx-imp@184,2? rusb3-intr@185? qusb3-tx-imp@186,1? pusb3-rx-imp@186,2? ousb3-intr@187? nusb2-intr-p0@188,1? *usb2-intr-p1@188,2? +usb2-intr-p2@189,1? ,usb2-intr-p3@189,2? -pciephy-rx-ln1@190,1? zpciephy-tx-ln1-nmos@190,2? ypciephy-tx-ln1-pmos@191,1? xpciephy-rx-ln0@191,2? wpciephy-tx-ln0-nmos@192,1? vpciephy-tx-ln0-pmos@192,2? upciephy-glb-intr@193? tdp-data@1ac?lvts1-calib@1bc?;lvts2-calib@1d0?8<svs-calib@580?d=socinfo-data1@7a0?t-phy@11c40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+okay.usb-phy@0?Cref Xt-phy@11c50000.mediatek,mt8195-tphymediatek,generic-tphy-v3+ disabled/usb-phy@0?Cref Zdsi-phy@11c800000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-tx?C _mipi_tx0_pll6  disableddsi-phy@11c900000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-tx?C _mipi_tx1_pll6  disabledi2c@11d00000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?"JCb; maindma+ disabled0i2c@11d01000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?"JCb; maindma+okayecdefault1pmic@34mediatek,mt6360?4 eWIRQBd2chargermediatek,mt6360-chg @usb-otg-vbus-regulator usb-otg-vbusC(XKregulatormediatek,mt6360-regulator e ,fbuck1 emi_vdd2  *3buck2 emi_vddq  *fldo1 ext_lcd_3v32Z2Z*4ldo2 panel1_p1v8w@w@*5ldo3vmc_pmuO6*Tldo5 vmch_pmu2Z2Z*Sldo6 mt6360_ldo6  *6ldo7 emi_vmddr_en  *7typecmediatek,mt6360-tcpc dWPD_IRQBconnectorusb-c-connector usb-phy@0? C refda_ref Vusb-phy@700?C refda_ref nopintrrx_imptx_imp _t-phy@11e40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+okay?usb-phy@0? C refda_ref Fusb-phy@700?C refda_ref qrsintrrx_imptx_imp Gphy@11e80000mediatek,mt8195-pcie-phy?siftuvwxyzGglb_intrtx_ln0_pmostx_ln0_nmosrx_ln0tx_ln1_pmostx_ln1_nmosrx_ln12 okay\ufs-phy@11fa0000.mediatek,mt8195-ufsphymediatek,mt8183-ufsphy?C unipromp okayUgpu@13000000>mediatek,mt8195-malimediatek,mt8192-maliarm,mali-valhall-jm?@C{0 Wjobmmugpu |(2 2 2 2 2 core0core1core2core3core4okay @clock-controller@13fbf000mediatek,mt8195-mfgcfg?6{syscon@14000000mediatek,mt8195-vppsys0syscon?6 }!dma-controller@14001000mediatek,mt8195-mdp3-rdma? }   ~2 C!<} } }}} display@14002000mediatek,mt8195-mdp3-fg?  } C!display@14003000mediatek,mt8195-mdp3-stitch?0 }0C!display@14004000mediatek,mt8195-mdp3-hdr?@ }@C!"display@14005000mediatek,mt8195-mdp3-aal?PF }PC! 2display@140060002mediatek,mt8195-mdp3-rszmediatek,mt8183-mdp3-rsz?` }` %C! display@14007000mediatek,mt8195-mdp3-tdshp?p }pC!#display@14008000mediatek,mt8195-mdp3-color?I }C!$2display@14009000mediatek,mt8195-mdp3-ovl?J }C!%2 display@1400a000mediatek,mt8195-mdp3-padding? }C!2display@1400b000mediatek,mt8195-mdp3-tcc? }C!dma-controller@1400c0004mediatek,mt8195-mdp3-wrotmediatek,mt8183-mdp3-wrot? }  +C! 2 mutex@1400f000mediatek,mt8195-vpp-mutex?P }C!2smi@14010000mediatek,mt8195-smi-sub-common?C!!!apbsmigals0 +2smi@14011000mediatek,mt8195-smi-sub-common?C!!!apbsmigals0 +2smi@14012000mediatek,mt8195-smi-common-vpp?  C!!!!apbsmigals0gals12larb@14013000mediatek,mt8195-smi-larb?0 8 +C!!apbsmi2iommu@14018000mediatek,mt8195-iommu-vpp?8 IRC!bclk2clock-controller@14e00000mediatek,mt8195-wpesys?6$clock-controller@14e02000mediatek,mt8195-wpesys_vpp0? 6Aclock-controller@14e03000mediatek,mt8195-wpesys_vpp1?06Blarb@14e04000mediatek,mt8195-smi-larb?@ 8 +C$$apbsmi2larb@14e05000mediatek,mt8195-smi-larb?P 8 +C$$! apbsmigals2syscon@14f00000mediatek,mt8195-vppsys1syscon?6 } #mutex@14f01000mediatek,mt8195-vpp-mutex?{ } C#'2larb@14f02000mediatek,mt8195-smi-larb?  8 +C##! apbsmigals2larb@14f03000mediatek,mt8195-smi-larb?0 8 +C##! apbsmigals2display@14f06000mediatek,mt8195-mdp3-split?` } `C##+#,2display@14f07000mediatek,mt8195-mdp3-tcc?p } pC#dma-controller@14f08000mediatek,mt8195-mdp3-rdma? }  C# 2 dma-controller@14f09000mediatek,mt8195-mdp3-rdma? }  C#  2 dma-controller@14f0a000mediatek,mt8195-mdp3-rdma? }  C#  2 display@14f0b000mediatek,mt8195-mdp3-fg? } C# display@14f0c000mediatek,mt8195-mdp3-fg? } C# display@14f0d000mediatek,mt8195-mdp3-fg? } C# display@14f0e000mediatek,mt8195-mdp3-hdr? } C#display@14f0f000mediatek,mt8195-mdp3-hdr? } C#display@14f10000mediatek,mt8195-mdp3-hdr? } C# display@14f11000mediatek,mt8195-mdp3-aal?i } C#2display@14f12000mediatek,mt8195-mdp3-aal? j } C#2display@14f13000mediatek,mt8195-mdp3-aal?0k } 0C#!2display@14f140002mediatek,mt8195-mdp3-rszmediatek,mt8183-mdp3-rsz?@ } @ C#display@14f150002mediatek,mt8195-mdp3-rszmediatek,mt8183-mdp3-rsz?P } P C#$display@14f160002mediatek,mt8195-mdp3-rszmediatek,mt8183-mdp3-rsz?` } ` C#%display@14f17000mediatek,mt8195-mdp3-tdshp?p } pC#display@14f18000mediatek,mt8195-mdp3-tdshp? } C#(display@14f19000mediatek,mt8195-mdp3-tdshp? } C#)display@14f1a000mediatek,mt8195-mdp3-merge? } C#2display@14f1b000mediatek,mt8195-mdp3-merge? } C#2display@14f1c000mediatek,mt8195-mdp3-color?t } C#2display@14f1d000mediatek,mt8195-mdp3-color? } uC#2display@14f1e000mediatek,mt8195-mdp3-color?v } C#2display@14f1f000mediatek,mt8195-mdp3-ovl?w } C#2 display@14f20000mediatek,mt8195-mdp3-padding? } C#2display@14f21000mediatek,mt8195-mdp3-padding? } C#2display@14f22000mediatek,mt8195-mdp3-padding?  } C#2dma-controller@14f230004mediatek,mt8195-mdp3-wrotmediatek,mt8183-mdp3-wrot?0 } 0 C# 2 dma-controller@14f240004mediatek,mt8195-mdp3-wrotmediatek,mt8183-mdp3-wrot?@ } @ C# 2 dma-controller@14f250004mediatek,mt8195-mdp3-wrotmediatek,mt8183-mdp3-wrot?P } P C# 2 clock-controller@15000000mediatek,mt8195-imgsys?6+larb@15001000mediatek,mt8195-smi-larb? 8  +C+++  apbsmigals2smi@15002000mediatek,mt8195-smi-sub-common? C++!apbsmigals0 +2smi@15003000mediatek,mt8195-smi-sub-common?0C+++ apbsmigals0 +2clock-controller@15110000 mediatek,mt8195-imgsys1_dip_top?6larb@15120000mediatek,mt8195-smi-larb? 8  +C+apbsmi2clock-controller@15130000mediatek,mt8195-imgsys1_dip_nr?6Cclock-controller@15220000mediatek,mt8195-imgsys1_wpe?"6larb@15230000mediatek,mt8195-smi-larb?# 8  +C+apbsmi2clock-controller@15330000mediatek,mt8195-ipesys?36,larb@15340000mediatek,mt8195-smi-larb?4 8  +C,,apbsmi2clock-controller@16000000mediatek,mt8195-camsys?6-larb@16001000mediatek,mt8195-smi-larb? 8  +C--- apbsmigals2larb@16002000mediatek,mt8195-smi-larb?  8 +C--apbsmi2smi@16004000mediatek,mt8195-smi-sub-common?@C---apbsmigals0 +2smi@16005000mediatek,mt8195-smi-sub-common?PC--!apbsmigals0 +2larb@16012000mediatek,mt8195-smi-larb?  8 +Capbsmi2 larb@16013000mediatek,mt8195-smi-larb?0 8 +Capbsmi2 larb@16014000mediatek,mt8195-smi-larb?@ 8 +Capbsmi2!larb@16015000mediatek,mt8195-smi-larb?P 8 +Capbsmi2!clock-controller@1604f000mediatek,mt8195-camsys_rawa?6clock-controller@1606f000mediatek,mt8195-camsys_yuva?6clock-controller@1608f000mediatek,mt8195-camsys_rawb?6clock-controller@160af000mediatek,mt8195-camsys_yuvb? 6clock-controller@16140000mediatek,mt8195-camsys_mraw?6larb@16141000mediatek,mt8195-smi-larb? 8 +C-- apbsmigals2"larb@16142000mediatek,mt8195-smi-larb?  8 +Capbsmi2"clock-controller@17200000mediatek,mt8195-ccusys? 6larb@17201000mediatek,mt8195-smi-larb?  8 +Capbsmi2video-codec@18000000mediatek,mt8195-vcodec-dec ~ + ?@`video-codec@2000mediatek,mtk-vcodec-lat-soc?   CA%%selvdeclattopHAX2video-codec@10000mediatek,mtk-vcodec-lat?0  CA%%selvdeclattopHAX2video-codec@25000mediatek,mtk-vcodec-core?PP  CA&&selvdeclattopHAX2larb@1800d000mediatek,mt8195-smi-larb? 8 +C%%apbsmi2larb@1800e000mediatek,mt8195-smi-larb? 8 +C!%apbsmi2clock-controller@1800f000mediatek,mt8195-vdecsys_soc?6%larb@1802e000mediatek,mt8195-smi-larb? 8 +C&&apbsmi2clock-controller@1802f000mediatek,mt8195-vdecsys?6&larb@1803e000mediatek,mt8195-smi-larb? 8 +C!'apbsmi2clock-controller@1803f000mediatek,mt8195-vdecsys_core1?6'clock-controller@190f3000mediatek,mt8195-apusys_pll?06Dclock-controller@1a000000mediatek,mt8195-vencsys?6(larb@1a010000mediatek,mt8195-smi-larb? 8 +C((apbsmi2video-codec@1a020000mediatek,mt8195-vcodec-enc?H `abcdvwxyU ~C( venc_selH@X2+Ejpeg-decoder@1a040000mediatek,mt8195-jpgdec20 mnrstu+0jpgdec@0,0mediatek,mt8195-jpgdec-hw?0 mnrstuWC(jpgdec2jpgdec@0,10000mediatek,mt8195-jpgdec-hw?0 mnrstuXC(jpgdec2jpgdec@1,0mediatek,mt8195-jpgdec-hw?0 \C)jpgdec2clock-controller@1b000000mediatek,mt8195-vencsys_core1?6)syscon@1c01a0005mediatek,mt8195-vdosys0mediatek,mt8195-mmsyssyscon? 6 "jpeg-encoder@1a030000mediatek,mt8195-jpgenc2 +0jpgenc@0,0mediatek,mt8195-jpgenc-hw? ghilVC(jpgenc2jpgenc@1,0mediatek,mt8195-jpgenc-hw? [C)jpgenc2larb@1b010000mediatek,mt8195-smi-larb? 8 +C))!  apbsmigals2ovl@1c000000mediatek,mt8195-disp-ovl?|2C"  Fports+port@0?endpointGport@1?endpoint Wrdma@1c002000mediatek,mt8195-disp-rdma? ~2C"   Hports+port@0?endpoint Wport@1?endpoint Wcolor@1c0030006mediatek,mt8195-disp-colormediatek,mt8173-disp-color?02C" 0Iports+port@0?endpoint Wport@1?endpoint Wccorr@1c0040006mediatek,mt8195-disp-ccorrmediatek,mt8192-disp-ccorr?@2C" @Jports+port@0?endpoint Wport@1?endpoint Waal@1c0050002mediatek,mt8195-disp-aalmediatek,mt8183-disp-aal?P2C" PKports+port@0?endpoint Wport@1?endpoint Wgamma@1c0060006mediatek,mt8195-disp-gammamediatek,mt8183-disp-gamma?`2C" `Lports+port@0?endpoint Wport@1?endpoint Wdither@1c0070008mediatek,mt8195-disp-dithermediatek,mt8183-disp-dither?p2C"  pMports+port@0?endpoint Wport@1?endpoint Wdsi@1c008000(mediatek,mt8195-dsimediatek,mt8183-dsi?2C""*enginedigitalhs dphy disabled+Nports+port@0?endpoint Wport@1?endpointOdsc@1c009000mediatek,mt8195-disp-dsc?2C" Pdsi@1c012000(mediatek,mt8195-dsimediatek,mt8183-dsi? 2C""+enginedigitalhs dphy disabledQmerge@1c014000mediatek,mt8195-disp-merge?@2C" @Rdp-intf@1c015000mediatek,mt8195-dp-intf?P2C","pixelenginepll disabledSmutex@1c016000mediatek,mt8195-disp-mutex?`2C" ` UTlarb@1c018000mediatek,mt8195-smi-larb? 8 +C"("(!  apbsmigals2larb@1c019000mediatek,mt8195-smi-larb? 8 +C"(! ! apbsmigals2syscon@1c100000mediatek,mt8195-vdosys1syscon?  6*smi@1c01b000mediatek,mt8195-smi-common-vdo? C"%"&")"$apbsmigals0gals12iommu@1c01f000mediatek,mt8195-iommu-vdo?8 IC"'bclk2mutex@1c101000mediatek,mt8195-disp-mutex?2C*  Ularb@1c102000mediatek,mt8195-smi-larb?  8 +C*** apbsmigals2larb@1c103000mediatek,mt8195-smi-larb?0 8 +C**!  apbsmigals2dma-controller@1c104000mediatek,mt8195-vdo1-rdma?@C*2 @ @ Vdma-controller@1c105000mediatek,mt8195-vdo1-rdma?PC*2 ` P Wdma-controller@1c106000mediatek,mt8195-vdo1-rdma?`C*2 A ` Xdma-controller@1c107000mediatek,mt8195-vdo1-rdma?pC*2 a p Ydma-controller@1c108000mediatek,mt8195-vdo1-rdma?C*2 B  Zdma-controller@1c109000mediatek,mt8195-vdo1-rdma?C*2 b  [dma-controller@1c10a000mediatek,mt8195-vdo1-rdma?C*2 C  \dma-controller@1c10b000mediatek,mt8195-vdo1-rdma?C*2 c  ]vpp-merge@1c10c000mediatek,mt8195-disp-merge?C* *mergemerge_async2  X*^vpp-merge@1c10d000mediatek,mt8195-disp-merge?C* *mergemerge_async2  X*_vpp-merge@1c10e000mediatek,mt8195-disp-merge?C* *mergemerge_async2  X*`vpp-merge@1c10f000mediatek,mt8195-disp-merge?C* *mergemerge_async2  X*avpp-merge@1c110000mediatek,mt8195-disp-merge?C* *mergemerge_async2  l*bdp-intf@1c113000mediatek,mt8195-dp-intf?02C*/*pixelenginepll disabledchdr-engine@1c114000mediatek,mt8195-disp-ethdrp?@Pp4mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsp @PphC*%* *#*!*$*"*1*&*'*(*)**mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsvdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncethdr_top2 de(*3*4*5*6*7Evdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncdedp-tx@1c500000mediatek,mt8195-edp-tx?Pdp_calibration_data2  disablededp-tx@1c600000mediatek,mt8195-dp-tx?`dp_calibration_data2  disabledfthermal-zonesgcpu0-thermal   tripstrip-alert L Epassivetrip-crit   Ecriticalhcooling-mapsmap0 0 cpu1-thermal   tripstrip-alert L Epassivetrip-crit   Ecriticalicooling-mapsmap0 0 cpu2-thermal   tripstrip-alert L Epassivetrip-crit   Ecriticaljcooling-mapsmap0 0 cpu3-thermal   tripstrip-alert L Epassivetrip-crit   Ecriticalkcooling-mapsmap0 0 cpu4-thermal   tripstrip-alert L Epassivetrip-crit   Ecriticallcooling-mapsmap0 0 cpu5-thermal   tripstrip-alert L Epassivetrip-crit   Ecriticalmcooling-mapsmap0 0 cpu6-thermal   tripstrip-alert L Epassivetrip-crit   Ecriticalncooling-mapsmap0 0 cpu7-thermal   tripstrip-alert L Epassivetrip-crit   Ecriticalocooling-mapsmap0 0 vpu0-thermal   tripstrip-alert L Epassiveptrip-crit   Ecriticalqvpu1-thermal   tripstrip-alert L Epassivertrip-crit   Ecriticalsgpu-thermal   tripstrip-alert L Epassivettrip-crit   Ecriticalugpu1-thermal   tripstrip-alert L Epassivevtrip-crit   Ecriticalwvdec-thermal   tripstrip-alert L Epassivextrip-crit   Ecriticalyimg-thermal   tripstrip-alert L Epassiveztrip-crit   Ecritical{infra-thermal   tripstrip-alert L Epassive|trip-crit   Ecritical}cam0-thermal   tripstrip-alert L Epassive~trip-crit   Ecriticalcam1-thermal   tripstrip-alert L Epassivetrip-crit   Ecriticalchosen serial0:921600n8firmwareopteelinaro,optee-tzJsmcmemory@400000003memory?@backlightpwm-backlight  @ *k 7default N  disabledgpio-keys gpio-keysbutton-volume-up} Sd j /soc/efuse@11c10000/usb3-rx-imp@186,2"M/soc/efuse@11c10000/usb3-intr@187'Z/soc/efuse@11c10000/usb2-intr-p0@188,1'e/soc/efuse@11c10000/usb2-intr-p1@188,2'p/soc/efuse@11c10000/usb2-intr-p2@189,1'{/soc/efuse@11c10000/usb2-intr-p3@189,2)/soc/efuse@11c10000/pciephy-rx-ln1@190,1./soc/efuse@11c10000/pciephy-tx-ln1-nmos@190,2./soc/efuse@11c10000/pciephy-tx-ln1-pmos@191,1)/soc/efuse@11c10000/pciephy-rx-ln0@191,2./soc/efuse@11c10000/pciephy-tx-ln0-nmos@192,1./soc/efuse@11c10000/pciephy-tx-ln0-pmos@192,2)/soc/efuse@11c10000/pciephy-glb-intr@193 /soc/efuse@11c10000/dp-data@1ac$/soc/efuse@11c10000/lvts1-calib@1bc$%/soc/efuse@11c10000/lvts2-calib@1d0"6/soc/efuse@11c10000/svs-calib@580E/soc/t-phy@11c40000L/soc/t-phy@11c40000/usb-phy@0T/soc/t-phy@11c50000[/soc/t-phy@11c50000/usb-phy@0c/soc/dsi-phy@11c80000l/soc/dsi-phy@11c90000u/soc/i2c@11d00000z/soc/i2c@11d01000/soc/i2c@11d01000/pmic@349/soc/i2c@11d01000/pmic@34/charger/usb-otg-vbus-regulator*/soc/i2c@11d01000/pmic@34/regulator/buck1*/soc/i2c@11d01000/pmic@34/regulator/buck2)/soc/i2c@11d01000/pmic@34/regulator/ldo1)/soc/i2c@11d01000/pmic@34/regulator/ldo2)/soc/i2c@11d01000/pmic@34/regulator/ldo3)/soc/i2c@11d01000/pmic@34/regulator/ldo5)/soc/i2c@11d01000/pmic@34/regulator/ldo6)/soc/i2c@11d01000/pmic@34/regulator/ldo7@/soc/i2c@11d01000/pmic@34/typec/connector/ports/port@0/endpoint@/soc/i2c@11d01000/pmic@34/typec/connector/ports/port@2/endpoint/soc/i2c@11d02000/soc/clock-controller@11d03000/soc/i2c@11e00000/soc/i2c@11e01000/soc/i2c@11e02000-*/soc/i2c@11e02000/typec-mux@48/port/endpoint/soc/i2c@11e03000 /soc/i2c@11e040009/soc/clock-controller@11e05000H/soc/t-phy@11e30000O/soc/t-phy@11e30000/usb-phy@0 W/soc/t-phy@11e30000/usb-phy@700_/soc/t-phy@11e40000f/soc/t-phy@11e40000/usb-phy@0 n/soc/t-phy@11e40000/usb-phy@700v/soc/phy@11e80000~/soc/ufs-phy@11fa0000/soc/gpu@13000000/soc/clock-controller@13fbf000/soc/syscon@14000000/soc/smi@14010000/soc/smi@14011000/soc/smi@14012000/soc/larb@14013000/soc/iommu@14018000/soc/clock-controller@14e00000/soc/clock-controller@14e02000/soc/clock-controller@14e03000/soc/larb@14e04000/soc/larb@14e05000/soc/syscon@14f00000$/soc/larb@14f02000*/soc/larb@14f030000/soc/clock-controller@150000007/soc/larb@15001000=/soc/smi@15002000U/soc/smi@15003000m/soc/clock-controller@15110000}/soc/larb@15120000/soc/clock-controller@15130000/soc/clock-controller@15220000/soc/larb@15230000/soc/clock-controller@15330000/soc/larb@15340000/soc/clock-controller@16000000/soc/larb@16001000/soc/larb@16002000/soc/smi@16004000/soc/smi@16005000/soc/larb@16012000/soc/larb@16013000/soc/larb@16014000 /soc/larb@16015000/soc/clock-controller@1604f000/soc/clock-controller@1606f000+/soc/clock-controller@1608f0007/soc/clock-controller@160af000C/soc/clock-controller@16140000O/soc/larb@16141000V/soc/larb@16142000]/soc/clock-controller@17200000d/soc/larb@17201000k/soc/larb@1800d000r/soc/larb@1800e000y/soc/clock-controller@1800f000/soc/larb@1802e000/soc/clock-controller@1802f000/soc/larb@1803e000/soc/clock-controller@1803f000/soc/clock-controller@190f3000/soc/clock-controller@1a000000/soc/larb@1a010000/soc/video-codec@1a020000/soc/clock-controller@1b000000/soc/syscon@1c01a000/soc/larb@1b010000/soc/ovl@1c000000(/soc/ovl@1c000000/ports/port@0/endpoint(/soc/ovl@1c000000/ports/port@1/endpoint/soc/rdma@1c002000)/soc/rdma@1c002000/ports/port@0/endpoint)/soc/rdma@1c002000/ports/port@1/endpoint/soc/color@1c003000*/soc/color@1c003000/ports/port@0/endpoint*/soc/color@1c003000/ports/port@1/endpoint*/soc/ccorr@1c004000*1/soc/ccorr@1c004000/ports/port@0/endpoint*;/soc/ccorr@1c004000/ports/port@1/endpointF/soc/aal@1c005000(K/soc/aal@1c005000/ports/port@0/endpoint(S/soc/aal@1c005000/ports/port@1/endpoint\/soc/gamma@1c006000*c/soc/gamma@1c006000/ports/port@0/endpoint*m/soc/gamma@1c006000/ports/port@1/endpointx/soc/dither@1c007000+/soc/dither@1c007000/ports/port@0/endpoint+/soc/dither@1c007000/ports/port@1/endpoint/soc/dsi@1c008000(/soc/dsi@1c008000/ports/port@0/endpoint(/soc/dsi@1c008000/ports/port@1/endpoint/soc/dsc@1c009000/soc/dsi@1c012000/soc/merge@1c014000/soc/dp-intf@1c015000/soc/mutex@1c016000/soc/larb@1c018000/soc/larb@1c019000/soc/syscon@1c100000/soc/smi@1c01b000/soc/iommu@1c01f000t/soc/mutex@1c101000/soc/larb@1c102000/soc/larb@1c103000/soc/dma-controller@1c104000/soc/dma-controller@1c105000/soc/dma-controller@1c106000'/soc/dma-controller@1c1070002/soc/dma-controller@1c108000=/soc/dma-controller@1c109000H/soc/dma-controller@1c10a000S/soc/dma-controller@1c10b000{/soc/vpp-merge@1c10c000/soc/vpp-merge@1c10d000/soc/vpp-merge@1c10e000/soc/vpp-merge@1c10f000/soc/vpp-merge@1c110000^/soc/dp-intf@1c113000f/soc/hdr-engine@1c114000g/soc/edp-tx@1c500000h/soc/dp-tx@1c600000n/thermal-zones-|/thermal-zones/cpu0-thermal/trips/trip-alert,/thermal-zones/cpu0-thermal/trips/trip-crit-/thermal-zones/cpu1-thermal/trips/trip-alert,/thermal-zones/cpu1-thermal/trips/trip-crit-/thermal-zones/cpu2-thermal/trips/trip-alert,/thermal-zones/cpu2-thermal/trips/trip-crit-/thermal-zones/cpu3-thermal/trips/trip-alert,/thermal-zones/cpu3-thermal/trips/trip-crit-/thermal-zones/cpu4-thermal/trips/trip-alert,/thermal-zones/cpu4-thermal/trips/trip-crit-/thermal-zones/cpu5-thermal/trips/trip-alert,/thermal-zones/cpu5-thermal/trips/trip-crit-/thermal-zones/cpu6-thermal/trips/trip-alert,/thermal-zones/cpu6-thermal/trips/trip-crit-/thermal-zones/cpu7-thermal/trips/trip-alert,/thermal-zones/cpu7-thermal/trips/trip-crit-$/thermal-zones/vpu0-thermal/trips/trip-alert,//thermal-zones/vpu0-thermal/trips/trip-crit-9/thermal-zones/vpu1-thermal/trips/trip-alert,D/thermal-zones/vpu1-thermal/trips/trip-crit,N/thermal-zones/gpu-thermal/trips/trip-alert+Y/thermal-zones/gpu-thermal/trips/trip-crit-c/thermal-zones/gpu1-thermal/trips/trip-alert,n/thermal-zones/gpu1-thermal/trips/trip-crit-x/thermal-zones/vdec-thermal/trips/trip-alert,/thermal-zones/vdec-thermal/trips/trip-crit,/thermal-zones/img-thermal/trips/trip-alert+/thermal-zones/img-thermal/trips/trip-crit./thermal-zones/infra-thermal/trips/trip-alert-/thermal-zones/infra-thermal/trips/trip-crit-/thermal-zones/cam0-thermal/trips/trip-alert,/thermal-zones/cam0-thermal/trips/trip-crit-/thermal-zones/cam1-thermal/trips/trip-alert,/thermal-zones/cam1-thermal/trips/trip-crit /backlight [/gpio-keys/regulator-wifi-3v3-en/regulator-vsys/regulator-vsys-buck/regulator-vcc5v0-sys /reserved-memory/optee@43200000!/reserved-memory/memory@50000000!'/reserved-memory/memory@53000000!//reserved-memory/memory@54600000!?/reserved-memory/memory@60000000!H/reserved-memory/memory@60f00000!T/reserved-memory/memory@61000000!a/reserved-memory/memory@62000000 compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typedp-intf0dp-intf1gce0gce1ethdr0mutex0mutex1merge1merge2merge3merge4merge5vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7i2c0i2c1i2c2i2c3i2c4ethernet0serial0serial1spi0spi1device_typeregenable-methodperformance-domainsclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellscpu-supplyphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedinterruptscpusstatusnum-channelswakeup-delay-msmediatek,platformpinctrl-namespinctrl-0audio-routingmediatek,adsplink-namesound-dai#clock-cellsclocksclock-divclock-multclock-output-names#performance-domain-cellsopp-sharedopp-hzopp-microvoltrangesdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesmediatek,rsel-resistance-in-si-unitpinmuxoutput-highdrive-strengthinput-enablebias-disableinput-disablebias-pull-updrive-strength-microampbias-pull-downoutput-low#power-domain-cellsdomain-supplyclock-namesmediatek,infracfgmediatek,disable-extrstassigned-clocksassigned-clock-parents#sound-dai-cellsinterrupts-extended#io-channel-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modesmediatek,long-press-modepower-off-time-seclinux,keycodeswakeup-source#iommu-cells#mbox-cellsmemory-regionfirmware-namepower-domainsmbox-namesmboxesmediatek,topckgenresetsreset-namesnvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsmediatek,pad-selectinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrphy-modephy-handlepinctrl-1mediatek,tx-delay-psmediatek,mac-wolsnps,reset-gpiosnps,reset-delays-ussnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blensnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,weightsnps,priorityphysmediatek,syscon-wakeuprole-switch-default-modeusb-role-switchvusb33-supplyvbus-supplyremote-endpointbus-widthmax-frequencyhs400-ds-delaycap-mmc-highspeedcap-mmc-hw-resetmmc-hs200-1_8vmmc-hs400-1_8vno-sdiono-sdnon-removablevmmc-supplyvqmmc-supplycap-sd-highspeedcd-gpiosno-mmcsd-uhs-sdr50sd-uhs-sdr104freq-table-hzmediatek,ufs-disable-mcqvcc-supplyvccq2-supplyusb2-lpm-disablemediatek,u3p-dis-mskbus-rangeiommu-mapiommu-map-maskphy-namesinterrupt-map-maskinterrupt-mapbits#phy-cellsrichtek,vinovp-microvoltLDO_VIN1-supplyLDO_VIN3-supplylabeldata-roleop-sink-microwattpower-roletry-power-rolesource-pdossink-pdosmode-switchorientation-switchoperating-points-v2power-domain-namesmali-supplymediatek,gce-client-regmediatek,gce-eventsmediatek,scpiommus#dma-cellsmediatek,smimediatek,larb-idmediatek,larbsmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzpolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-pathbrightness-levelsdefault-brightness-levelenable-gpiosnum-interpolated-stepspwmsdebounce-intervallinux,codeenable-active-highvin-supplyregulator-boot-onno-mapcpu0cpu1cpu2cpu3cpu4cpu5cpu6cpu7cpu_ret_lcpu_ret_bcpu_off_lcpu_off_bl2_0l2_1l3_0dmic_codecsoundclk13mclk26mclk32kperformancegpu_opp_tabletimergicppi_cluster0ppi_cluster1infracfg_aoaudio_default_pinsdsi0_backlight_pinseth_default_pinseth_sleep_pinsgpio_key_pinsi2c2_pinsi2c4_pinsi2c6_pinsmmc0_default_pinsmmc0_uhs_pinsmmc1_default_pinsmmc1_pins_detectmt6360_pinspanel_default_pinspcie0_default_pinspcie1_default_pinspwm0_default_pinsspi1_pinsspi2_pinstouch_pinsuart0_pinsuart1_pinsusb3_port0_pinsusb2_port0_pinswifi_vreg_pinsscpsysspmmfg0mfg1watchdogapmixedsyssystimerpwrappmicpmic_adcmt6359codecmt6359_vs1_buck_regmt6359_vgpu11_buck_regmt6359_vmodem_buck_regmt6359_vpu_buck_regmt6359_vcore_buck_regmt6359_vs2_buck_regmt6359_vpa_buck_regmt6359_vproc2_buck_regmt6359_vproc1_buck_regmt6359_vcore_sshub_buck_regmt6359_vgpu11_sshub_buck_regmt6359_vaud18_ldo_regmt6359_vsim1_ldo_regmt6359_vibr_ldo_regmt6359_vrf12_ldo_regmt6359_vusb_ldo_regmt6359_vsram_proc2_ldo_regmt6359_vio18_ldo_regmt6359_vcamio_ldo_regmt6359_vcn18_ldo_regmt6359_vfe28_ldo_regmt6359_vcn13_ldo_regmt6359_vcn33_1_bt_ldo_regmt6359_vcn33_1_wifi_ldo_regmt6359_vaux18_ldo_regmt6359_vsram_others_ldo_regmt6359_vefuse_ldo_regmt6359_vxo22_ldo_regmt6359_vrfck_ldo_regmt6359_vrfck_1_ldo_regmt6359_vbif28_ldo_regmt6359_vio28_ldo_regmt6359_vemc_ldo_regmt6359_vemc_1_ldo_regmt6359_vcn33_2_bt_ldo_regmt6359_vcn33_2_wifi_ldo_regmt6359_va12_ldo_regmt6359_va09_ldo_regmt6359_vrf18_ldo_regmt6359_vsram_md_ldo_regmt6359_vufs_ldo_regmt6359_vm18_ldo_regmt6359_vbbck_ldo_regmt6359_vsram_proc1_ldo_regmt6359_vsim2_ldo_regmt6359_vsram_others_sshub_ldomt6359rtcmt6359keysspmimt6315_6mt6315_6_vbuck1mt6315_7mt6315_7_vbuck1iommu_infrascp_adspadsp_mailbox0adsp_mailbox1afeuart0uart1uart2uart3uart4uart5auxadcpericfg_aol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