8 ( \ .,ARM Corstone1000 FVP (Fixed Virtual Platform)2arm,corstone1000-fvpaliases=/soc/serial@1a510000E/soc/serial@1a520000chosenMserial0:115200n8cpus cpu@0Ycpu2arm,cortex-a35eipsciwcpu@1Ycpu2arm,cortex-a35eipsciwcpu@2Ycpu2arm,cortex-a35eipsciwcpu@3Ycpu2arm,cortex-a35eipsciwmemory@88200000Ymemorye winterrupt-controller@1c000000 2arm,gic-400 e    l2-cache02cache@clock-100000000 2fixed-clock apb_pclkclock-48000000 2fixed-clocklsmclktimer2arm,armv8-timer0   clock-50000000 2fixed-clockuartclkpsci2arm,psci-1.0arm,psci-0.2psmcsoc 2simple-bus 1timer@1a2200002arm,armv7-timer-meme" 1frame@1a2300008 e#serial@1a5100002arm,pl011arm,primecelleQ ELuartclkapb_pclkserial@1a5200002arm,pl011arm,primecelleR ELuartclkapb_pclkmailbox@1b8200002arm,mhuv2-txarm,primecelleE Lapb_pclk -Xdxokay disabledmailbox@1b8300002arm,mhuv2-rxarm,primecelleE Lapb_pclk .Xdxokay disabledethernet@40100002smsc,lan91c111e@mii tregulator-vmmc2regulator-fixed vmmc_supply2Z2Zmmc@403000002arm,pl18xarm,primecelle@0 uELsmclkapb_pclkmmc@500000002arm,pl18xarm,primecelleP sELsmclkapb_pclk interrupt-parent#address-cells#size-cellsmodelcompatibleserial0serial1stdout-pathdevice_typeregenable-methodnext-level-cache#interrupt-cellsinterrupt-controllerinterruptsphandlecache-unifiedcache-levelcache-sizecache-line-sizecache-sets#clock-cellsclock-frequencyclock-output-namesrangesframe-numberclocksclock-names#mbox-cellsarm,mhuv2-protocolssecure-statusphy-modereg-io-widthregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onmax-frequencyvmmc-supply