|?8n( on,rockchip,rk3588-toybrick-x0rockchip,rk3588 +#7Rockchip Toybrick TB-RK3588X Boardaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55 psci+ 2 BO@an{@  cpu@100cpuarm,cortex-a55 psci+ 2 BO@an{@ cpu@200cpuarm,cortex-a55 psci+ 2 BO@an{@ cpu@300cpuarm,cortex-a55 psci+ 2 BO@an{@ cpu@400cpuarm,cortex-a76 psci+ 2 BO@an{@cpu@500cpuarm,cortex-a76 psci+ 2 BO@an{@cpu@600cpuarm,cortex-a76 psci+ 2 BO@an{@cpu@700cpuarm,cortex-a76 psci+ 2 BO@an{@ idle-statespscicpu-sleeparm,idle-state0dAxQ l2-cache-l0cacheDQ@cbn l2-cache-l1cacheDQ@cbnl2-cache-l2cacheDQ@cbnl2-cache-l3cacheDQ@cbnl2-cache-b0cacheDQ@cbnl2-cache-b1cacheDQ@cbnl2-cache-b2cacheDQ@cbnl2-cache-b3cacheDQ@cbnl3-cachecacheD0Q@cbndisplay-subsystemrockchip,display-subsystem|firmwarescmi arm,scmi-smc+protocol@14 protocol@16hdmi0-soundsimple-audio-cardi2shdmi0 disabledsimple-audio-card,codecsimple-audio-card,cpupmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmu psci arm,psci-1.0smcclock-0 fixed-clock)׫#splltimerarm,armv8-timerP    %6sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6#xin24mclock-2 fixed-clock#xin32kreserved-memory+Fshmem@10f000arm,scmi-shmemMhdmi-receiver-cmashared-dma-poolTJ aM disabled gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf k { +!!!corecoregroupstacks 0\]^ 6jobmmugpu"  disabled#usb@fc000000rockchip,rk3588-dwc3snps,dwc3@+!!!ref_clksuspend_clkbus_clkotg $%usb2-phyusb3-phy utmi_wide"!R:[ disabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci+!!!&'usb"okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci+!!!&'usb"okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci+!!!()usb"okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci+!!!()usb"okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(+!j!i!h!k!r&ref_clksuspend_clkbus_clkutmipipehost* usb3-phy utmi_wide!4:[} disablediommu@fc900000 arm,smmu-v3 @qsvo6eventqgerrorpriqcmdq-synciommu@fcb00000 arm,smmu-v3 @}{6eventqgerrorpriqcmdq-sync disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX|syscon@fd58c000rockchip,rk3588-sys-grfsysconXpsyscon@fd5e8000!rockchip,rk3588-dcphy-grfsyscon^@syscon@fd5ec000!rockchip,rk3588-dcphy-grfsyscon^@syscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ qsyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` +!syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@+!rsyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@syscon@fd5b0000rockchip,rk3588-php-grfsyscon[,syscon@fd5b4000#rockchip,rk3588-csidphy-grfsyscon[@syscon@fd5b5000#rockchip,rk3588-csidphy-grfsyscon[Psyscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@0rockchip,rk3588-usb2phy+!phyclk #usb480m_phy0!m!phyapb disabledotg-port disabled$syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy+!phyclk #usb480m_phy2!o!phyapbokay&host-portokay+'syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy+!phyclk #usb480m_phy3!p! phyapbokay(host-portokay+)syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^syscon@fd5f0000rockchip,rk3588-iocsyscon_sram@fd600000 mmio-sram`F`+clock-controller@fd7c0000rockchip,rk3588-cru|k!!!!!!!!!!!!!]!q!!@{A.2Fq)׫ׄe/ׄ eZ р ,!i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=+!t!s i2cpclk-default+okayregulator@42rockchip,rk8602Bvdd_cpu_big0_s0+=dpUm.regulator-state-memregulator@43 rockchip,rk8603rockchip,rk8602Cvdd_cpu_big1_s0+=dpUm.regulator-state-memserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK+!!baudclkapb_pclk//txrx0default disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm+!! pwmpclk1default disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm+!! pwmpclk2default disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm +!! pwmpclk3defaultokay$pwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0+!! pwmpclk4default disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfdspower-controller!rockchip,rk3588-power-controller+okay"power-domain@8+power-domain@9  +!!!#!"! 567+power-domain@10 +!!!#!"8power-domain@11 +!!!#!"9power-domain@12 +!!!:;<=>power-domain@13 +power-domain@14(+!!!!!?power-domain@15 +!!!!@power-domain@16+!! ABC+power-domain@17 +!!!! DEFpower-domain@21+!!!!!!!!!!!!!!!!!! GHIJKLMN+power-domain@23+!C!A!Opower-domain@14 +!!!!?power-domain@15+!!!@power-domain@22+!!Ppower-domain@24+![!Z!]QR+power-domain@258+!!!!!!!ZSpower-domain@268+!!!!!!!QTUpower-domain@270+!!!!!!VWXY+power-domain@28 +!!!!Z[power-domain@29(+!!!!!\]power-domain@30+!z!{^power-domain@31@+!W!!!!!!!_`abpower-domain@33!+!W!Z![power-domain@34"+!W!Z![power-domain@37%+!!2cpower-domain@38&+!4!5power-domain@40(dnpu@fdab0000rockchip,rk3588-rknn-core00 pccnacoren +!! !#aclkhclknpupclkk { !!srst_asrst_h"  e disablediommu@fdab9000,rockchip,rk3588-iommurockchip,rk3568-iommu n+!!  aclkiface"  disabledenpu@fdac0000rockchip,rk3588-rknn-core00 pccnacoreo +!! !#aclkhclknpupclkk { !!srst_asrst_h"  f disablediommu@fdac9000,rockchip,rk3588-iommurockchip,rk3568-iommuo+!! aclkiface"  disabledfnpu@fdad0000rockchip,rk3588-rknn-core00 pccnacorep +!! !#aclkhclknpupclkk { !!srst_asrst_h"  g disablediommu@fdad9000,rockchip,rk3588-iommurockchip,rk3568-iommup+!! aclkiface"  disabledgvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuw6vdpu+!! aclkhclk h"iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu@v aclkiface+!!"hrga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rgat+!!!aclkhclksclk!r!q!p coreaxiahb"video-codec@fdba0000rockchip,rk3588-vepu121z+!! aclkhclk i"iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu@y+!! aclkiface"ivideo-codec@fdba4000rockchip,rk3588-vepu121@|+!! aclkhclk j"iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommuH@{+!! aclkiface"jvideo-codec@fdba8000rockchip,rk3588-vepu121~+!! aclkhclk k"iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu@}+!! aclkiface"kvideo-codec@fdbac000rockchip,rk3588-vepu121+!! aclkhclk l"iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu@+!! aclkiface"lvideo-codec@fdc70000rockchip,rk3588-av1-vpul6vdpuk!A!C{ׄׄ+!A!C aclkhclk" !!!!vop@fdd90000rockchip,rk3588-vop BPvopgamma-lut@+!]!\!a!b!c!d![mnQaclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_voppll_hdmiphy0pll_hdmiphy1 o"pq"r3s disabledports+port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~+!]!\ aclkiface" disabledospdif-tx@fddb0000,rockchip,rk3588-spdifrockchip,rk3568-spdif@!k! mclkhclk+!!txt"W disabledi2s@fddc0000rockchip,rk3588-i2s-tdm+!!!mclk_txmclk_rxhclkk!@!utx"!tx-mW disabledspdif-tx@fdde0000,rockchip,rk3588-spdifrockchip,rk3568-spdif@!k!A mclkhclk+!D!@txt"W disabledi2s@fddf0000rockchip,rk3588-i2s-tdm+!4!4!5mclk_txmclk_rxhclkk!1@!utx"!tx-mW disabledi2s@fddfc000rockchip,rk3588-i2s-tdm+!0!0!,mclk_txmclk_rxhclkk!-@!urx"!rx-mW disableddsi@fde20000rockchip,rk3588-mipi-dsi2+!e!g pclksys!apb"v dcphyq disabledports+port@0port@1dsi@fde30000rockchip,rk3588-mipi-dsi2+!f!h pclksys!apb"w dcphyq disabledports+port@0port@1dp@fde50000rockchip,rk3588-dp@k!{$(+!!!!!apbauxhdcpi2sspdif%"!W disabledports+port@0port@1hdmi@fde80000rockchip,rk3588-dw-hdmi-qp0+!!!!4!R!pclkearcrefaudhdphclk_vo1Ph6avpcecearcmainhpdmdefaultxyz{"!!0refhdpphrW disabledports+port@0port@1edp@fdec0000rockchip,rk3588-edp+!!dppclkmdp"!!dpapbr disabledports+port@0port@1qos@fdf35000rockchip,rk3588-qossysconP :qos@fdf35200rockchip,rk3588-qossysconR ;qos@fdf35400rockchip,rk3588-qossysconT <qos@fdf35600rockchip,rk3588-qossysconV =qos@fdf36000rockchip,rk3588-qossyscon` ^qos@fdf39000rockchip,rk3588-qossyscon cqos@fdf3d800rockchip,rk3588-qossyscon dqos@fdf3e000rockchip,rk3588-qossyscon `qos@fdf3e200rockchip,rk3588-qossyscon _qos@fdf3e400rockchip,rk3588-qossyscon aqos@fdf3e600rockchip,rk3588-qossyscon bqos@fdf40000rockchip,rk3588-qossyscon \qos@fdf40200rockchip,rk3588-qossyscon ]qos@fdf40400rockchip,rk3588-qossyscon Vqos@fdf40500rockchip,rk3588-qossyscon Wqos@fdf40600rockchip,rk3588-qossyscon Xqos@fdf40800rockchip,rk3588-qossyscon Yqos@fdf41000rockchip,rk3588-qossyscon Zqos@fdf41100rockchip,rk3588-qossyscon [qos@fdf60000rockchip,rk3588-qossyscon Aqos@fdf60200rockchip,rk3588-qossyscon Bqos@fdf60400rockchip,rk3588-qossyscon Cqos@fdf61000rockchip,rk3588-qossyscon Dqos@fdf61200rockchip,rk3588-qossyscon Eqos@fdf61400rockchip,rk3588-qossyscon Fqos@fdf62000rockchip,rk3588-qossyscon ?qos@fdf63000rockchip,rk3588-qossyscon0 @qos@fdf64000rockchip,rk3588-qossyscon@ Oqos@fdf66000rockchip,rk3588-qossyscon` Gqos@fdf66200rockchip,rk3588-qossysconb Hqos@fdf66400rockchip,rk3588-qossyscond Iqos@fdf66600rockchip,rk3588-qossysconf Jqos@fdf66800rockchip,rk3588-qossysconh Kqos@fdf66a00rockchip,rk3588-qossysconj Lqos@fdf66c00rockchip,rk3588-qossysconl Mqos@fdf66e00rockchip,rk3588-qossysconn Nqos@fdf67000rockchip,rk3588-qossysconp Pqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon 8qos@fdf71000rockchip,rk3588-qossyscon 9qos@fdf72000rockchip,rk3588-qossyscon 5qos@fdf72200rockchip,rk3588-qossyscon" 6qos@fdf72400rockchip,rk3588-qossyscon$ 7qos@fdf80000rockchip,rk3588-qossyscon Sqos@fdf81000rockchip,rk3588-qossyscon Tqos@fdf81200rockchip,rk3588-qossyscon Uqos@fdf82000rockchip,rk3588-qossyscon Qqos@fdf82200rockchip,rk3588-qossyscon" Rdfi@fe060000rockchip,rk3588-dfi@&0:3|pcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pciex0?0+!C!H!>!M!R!)aclk_mstaclk_slvaclk_dbipclkauxpipepciP6syspmcmsglegacyerr`}}}}0~000* pcie-phy""TF @ @0 @@dbiapbconfig!)!. pwrpipe+ disabledlegacy-interrupt-controller }pcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pciex@O0+!D!I!?!N!S!s)aclk_mstaclk_slvaclk_dbipclkauxpipepciP6syspmcmsglegacyerr`@~@@@ pcie-phy""TF @ @0 A@dbiapbconfig!*!/ pwrpipe+ disabledlegacy-interrupt-controller ethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a 6macirqeth_wake_irq(+!6!7!Y!^!50stmmacethclk_mac_refpclk_macaclk_macptp_ref"!!$ stmmacethp,&7J] disabledmdiosnps,dwmac-mdio+stmmac-axi-configfprx-queues-configqueue0queue1tx-queues-configqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(+!b!_!e!T!osatapmaliverxoobrefasic+ disabledsata-port@0@ sata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(+!d!a!g!V!qsatapmaliverxoobrefasic+ disabledsata-port@0@* sata-phy  spi@fe2b0000 rockchip,sfc+@+!/!0clk_sfchclk_sfc+ disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ +  !!biuciuciu-driveciu-sample default"( disabledmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ +!!!!biuciuciu-driveciu-sample default"% disabledmmc@fe2e0000rockchip,rk3588-dwcmshc.k!-!.!, { n6 (+!,!*!+!-!.corebusaxiblocktimer default(!!!!!corebusaxiblocktimerokay+EMSrng@fe378000rockchip,rk3588-rng7+ 0i2s@fe470000rockchip,rk3588-i2s-tdmG+!+!/!(mclk_txmclk_rxhclkk!)!-@!!//txrx"&!*!+ tx-mrx-madefault(W disabledi2s@fe480000rockchip,rk3588-i2s-tdmH+!y!}!umclk_txmclk_rxhclk//txrx!^!_ tx-mrx-madefault(W disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI+!!i2s_clki2s_hclkk!@!tttxrx"&defaultW disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ+!%!i2s_clki2s_hclkk!"@!tttxrx"&defaultW disabledspdif-tx@fe4e0000,rockchip,rk3588-spdifrockchip,rk3568-spdifN@!k!7 mclkhclk+!9!6tx/default"&W disabledspdif-tx@fe4f0000,rockchip,rk3588-spdifrockchip,rk3568-spdifO@!k!= mclkhclk+!?!<txtdefault"&W disabledinterrupt-controller@fe600000 arm,gic-v3 `h |a8F+msi-controller@fe640000arm,gic-v3-itsd|~msi-controller@fe660000arm,gic-v3-itsf| ppi-partitionsinterrupt-partition-0interrupt-partition-1  dma-controller@fea10000arm,pl330arm,primecell@ VW+!n apb_pclk/dma-controller@fea30000arm,pl330arm,primecell@ XY+!o apb_pclkti2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c+!!{ i2cpclk>default+ disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c+!!| i2cpclk?default+okayrtc@51haoyu,hym8563Q#hym8563 defaulti2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c+!!} i2cpclk@default+ disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c+!!~ i2cpclkAdefault+ disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c+!! i2cpclkBdefault+ disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !+!T!W pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt+!d!c tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF+!!spiclkapb_pclk//txrx default+ disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG+!!spiclkapb_pclk//txrx default+ disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH+!!spiclkapb_pclktttxrxdefault+okayk!{ pmic@0rockchip,rk806  default B@ ) A. M. Y. e. q. }. . . . .  .   .dvs1-null-pins gpio_pwrctrl1 pin_fun0dvs2-null-pins gpio_pwrctrl2 pin_fun0dvs3-null-pins gpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1 vdd_gpu_s0+ =dpU~m0>regulator-state-memdcdc-reg2vdd_cpu_lit_s0+=dpU~m0regulator-state-memdcdc-reg3 vdd_log_s0+= LU qm0regulator-state-mem $ qdcdc-reg4 vdd_vdenc_s0+=dpU~m0regulator-state-memdcdc-reg5 vdd_ddr_s0+= LU m0regulator-state-mem $ Pdcdc-reg6 vdd2_ddr_s3+regulator-state-mem @dcdc-reg7vdd_2v0_pldo_s3+=Uregulator-state-mem @ $dcdc-reg8 vcc_3v3_s3+=2ZU2Zregulator-state-mem @ $2Zdcdc-reg9 vddq_ddr_s0+regulator-state-memdcdc-reg10 vcc_1v8_s3+=w@Uw@regulator-state-mem @ $w@pldo-reg1 avcc_1v8_s0+=w@Uw@&regulator-state-mempldo-reg2 vcc_1v8_s0+=w@Uw@regulator-state-mem $w@pldo-reg3 avdd_1v2_s0+=OUOregulator-state-mempldo-reg4 vcc_3v3_s0+=2ZU2Zregulator-state-mempldo-reg5 vccio_sd_s0+=w@U2Zregulator-state-mempldo-reg6 pldo6_s3+=w@Uw@regulator-state-mem @ $w@nldo-reg1 vdd_0v75_s3+= qU qregulator-state-mem @ $ qnldo-reg2vdd_ddr_pll_s0+= PU Pregulator-state-mem $ Pnldo-reg3 avdd_0v75_s0+= |U |'regulator-state-memnldo-reg4 vdd_0v85_s0+= PU P%regulator-state-memnldo-reg5 vdd_0v75_s0+= qU qregulator-state-memspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI+!!spiclkapb_pclktttxrx default+ disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL+!!baudclkapb_pclk// txrxdefault disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM+!!baudclkapb_pclk/ / txrxdefaultokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN+!!baudclkapb_pclk/ / txrxdefault disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO+!!baudclkapb_pclkt t txrxdefault disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP+!!baudclkapb_pclkt t txrxdefault disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ+!!baudclkapb_pclkt ttxrxdefault disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR+!!baudclkapb_pclkuutxrxdefault disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS+!!baudclkapb_pclku u txrxdefault disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT+!!baudclkapb_pclku u txrxdefault disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm+!L!K pwmpclkdefault disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm+!L!K pwmpclkdefault disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm +!L!K pwmpclkdefault disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0+!L!K pwmpclkdefault disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm+!O!N pwmpclkdefault disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm+!O!N pwmpclkdefault disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm +!O!N pwmpclkdefault disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0+!O!N pwmpclkdefault disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm+!R!Q pwmpclkdefault disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm+!R!Q pwmpclkdefault disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm +!R!Q pwmpclkdefault disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0+!R!Q pwmpclkdefault disabledthermal-zonespackage-thermal X n |tripspackage-crit 8  criticalbigcore0-thermal Xd n |tripsbigcore0-alert L passivebigcore0-crit 8  criticalcooling-mapsmap0  bigcore2-thermal Xd n |tripsbigcore2-alert L passivebigcore2-crit 8  criticalcooling-mapsmap0   littlecore-thermal Xd n |tripslittlecore-alert L passivelittlecore-crit 8  criticalcooling-mapsmap0 0 center-thermal X n |tripscenter-crit 8  criticalgpu-thermal Xd n |tripsgpu-alert L passivegpu-crit 8  criticalcooling-mapsmap0  npu-thermal X n |tripsnpu-crit 8  criticaltsadc@fec00000rockchip,rk3588-tsadc+!!tsadcapb_pclkk!{!V!Wtsadc-apbtsadc    defaultsleep okayadc@fec10000rockchip,rk3588-saradc +!!saradcapb_pclk!U saradc-apbokay 2"i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c+!! i2cpclkCdefault+ disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c+!! i2cpclkDdefault+ disabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c+!! i2cpclkEdefault+ disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ+!!spiclkapb_pclku utxrx default+ disabledefuse@fecc0000rockchip,rk3588-otp +!!!!otpapb_pclkphyarb!!! otpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c >npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[+!p apb_pclkuphy@fed60000rockchip,rk3588-hdptx-phy +!!Trefapb8!#!!c!d!e!!!""phyapbinitcmnlaneroplllcpll disabledmphy@fed80000rockchip,rk3588-usbdp-phy+!!l!Vrefclkimmortalpclkutmi(! ! ! !!initcmnlanepcs_apbpma_apb C V gh disabled%phy@feda0000rockchip,rk3588-mipi-dcphy+!! pclkref !i!!!jm_phyapbgrfs_phy disabledvphy@fedb0000rockchip,rk3588-mipi-dcphy+!! pclkref !k!!!lm_phyapbgrfs_phy disabledwphy@fedc0000rockchip,rk3588-csi-dphy+!pclk!!apbphy disabledphy@fedc8000rockchip,rk3588-csi-dphy܀+!pclk!!apbphy disabledphy@fee00000rockchip,rk3588-naneng-combphy+!!v!W refapbpipek!{!<!Cphyapb }, okayphy@fee20000rockchip,rk3588-naneng-combphy+!!x!W refapbpipek!{!>!Ephyapb }, okay*sram@ff001000 mmio-sramF+pinctrlrockchip,rk3588-pinctrlF+gpio@fd8a0000rockchip,gpio-bank+!q!r  gpio@fec20000rockchip,gpio-bank+!s!t  gpio@fec30000rockchip,gpio-bank+!u!v @  gpio@fec40000rockchip,gpio-bank+!w!x `  gpio@fec50000rockchip,gpio-bank+!y!z  pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-2  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  pcfg-pull-none-drv-level-1-smt   pcfg-pull-none-drv-level-3-smt   pcfg-pull-none-drv-level-5-smt   auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout emmc-bus8 emmc-clk emmc-cmd emmc-data-strobe eth1fspigmac1gpuhdmihdmim0-tx0-cec xhdmim0-tx0-hpd yhdmim0-tx0-scl zhdmim0-tx0-sda {hdmim0-tx1-hpd hdmim1-tx1-scl hdmim1-tx1-sda  hdmim2-tx1-cec i2c0i2c0m2-xfer -i2c1i2c1m0-xfer  i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2s0i2s0-lrck i2s0-sclk i2s0-sdi0 i2s0-sdi1 i2s0-sdi2 i2s0-sdi3 i2s0-sdo0 i2s0-sdo1 i2s0-sdo2 i2s0-sdo3 i2s1i2s1m0-lrck i2s1m0-sclk i2s1m0-sdi0 i2s1m0-sdi1 i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m1-lrck i2s2m1-sclk  i2s2m1-sdi  i2s2m1-sdo  i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp pmupwm0pwm0m0-pins 1pwm1pwm1m0-pins 2pwm2pwm2m0-pins 3pwm3pwm3m0-pins 4pwm4pwm4m0-pins  pwm5pwm5m0-pins pwm6pwm6m0-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m0-pins  pwm15pwm15m0-pins  refclksatasata0sata1sata2sdiosdiom1-pins` sdmmcsdmmc-bus4@ sdmmc-clk sdmmc-cmd sdmmc-det spdif0spdif0m0-tx spdif1spdif1m0-tx spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0 spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m0-pins0 spi4m0-cs0 spi4m0-cs1 tsadctsadc-shut-org uart0uart0m1-xfer  0uart1uart1m1-xfer   uart2uart2m0-xfer  uart3uart3m1-xfer   uart4uart4m1-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m1-xfer   uart8uart8m1-xfer   uart9uart9m1-xfer   vopbt656gpio-functsadc-gpio-func eth0gmac0gmac0-miim gmac0-rx-bus20 gmac0-tx-bus20 gmac0-rgmii-clk  gmac0-rgmii-bus@   rtl8211frtl8211f-rst  hym8563hym8563-int usbvcc5v0-host-en (hdmi1-soundsimple-audio-cardi2shdmi1 disabledsimple-audio-card,codecsimple-audio-card,cpuusb@fc400000rockchip,rk3588-dwc3snps,dwc3@@+!!!ref_clksuspend_clkbus_clkotg usb2-phyusb3-phy utmi_wide"!S:[ disabledsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon[!syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\ syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon\@syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@@+usb2phy@4000rockchip,rk3588-usb2phy@+!phyclk #usb480m_phy1!n!phyapb disabledotg-port disabledsyscon@fd5e4000$rockchip,rk3588-hdptxphy-grfsyscon^@spdif-tx@fddb8000,rockchip,rk3588-spdifrockchip,rk3568-spdifۀ@!k! mclkhclk+!!txt"W disabledi2s@fddc8000rockchip,rk3588-i2s-tdm܀+!!!mclk_txmclk_rxhclkk!@!utx"!tx-mW disabledspdif-tx@fdde8000,rockchip,rk3588-spdifrockchip,rk3568-spdifހ@!k!F mclkhclk+!I!Etxt"W disabledi2s@fddf4000rockchip,rk3588-i2s-tdm@+!9!9!?mclk_txmclk_rxhclkk!6@!utx"!tx-mW disabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀+!+!+!'mclk_txmclk_rxhclkk!(@!urx"!rx-mW disabledi2s@fde00000rockchip,rk3588-i2s-tdm+!&!&!"mclk_txmclk_rxhclkk!#@!urx"!rx-mW disableddp@fde60000rockchip,rk3588-dp@k!{$(+!!!!!apbauxhdcpi2sspdif"!W disabledports+port@0port@1hdmi@fdea0000rockchip,rk3588-dw-hdmi-qp0+!!!!9!S!pclkearcrefaudhdphclk_vo1Pi6avpcecearcmainhpdndefault "!!1refhdpphrW disabledports+port@0port@1edp@fded0000rockchip,rk3588-edp+!!dppclkndp"!!dpapbr disabledports+port@0port@1hdmi_receiver@fdee0000.rockchip,rk3588-hdmirx-ctrlersnps,dw-hdmi-rx`0 6cechdmidma8+! !!! ! !!!3aclkaudiocr_parapclkrefhclk_s_hdmirxhclk_vo1  " !!!!axiapbrefbiup"r disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+x0+!@!E!;!J!O!t)aclk_mstaclk_slvaclk_dbipclkauxpipepciP6syspmcmsglegacyerr`       pcie-phy""TF @ @0 @@dbiapbconfig!&!+ pwrpipe disabledlegacy-interrupt-controller  pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @ @ @0dbidbi2apbaddr_spaceatu0+!@!E!;!J!O!t)aclk_mstaclk_slvaclk_dbipclkauxpipe +6syspmcmsglegacyerrdma0dma1dma2dma3  pcie-phy""!&!+ pwrpipe disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+x0+!A!F!<!K!P!u)aclk_mstaclk_slvaclk_dbipclkauxpipepciP6syspmcmsglegacyerr`   pcie-phy""TF @ @@0 @@@dbiapbconfig!'!, pwrpipe disabledlegacy-interrupt-controller pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pciex /0+!B!G!=!L!Q!)aclk_mstaclk_slvaclk_dbipclkauxpipepciP6syspmcmsglegacyerr` ~    pcie-phy""TF @ @0 @@dbiapbconfig!(!- pwrpipe+ disabledlegacy-interrupt-controller ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a 6macirqeth_wake_irq(+!6!7!X!]!40stmmacethclk_mac_refpclk_macaclk_macptp_ref"!!# stmmacethp,&7J]okay output ' 2rgmii-rxiddefault ; DCmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916default MN  ] o stmmac-axi-configfprx-queues-configqueue0queue1tx-queues-configqueue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(+!c!`!f!U!psatapmaliverxoobrefasic+ disabledsata-port@0@ sata-phy  phy@fed70000rockchip,rk3588-hdptx-phy +!!Urefapb8!&!!f!g!h!$!%"phyapbinitcmnlaneroplllcpll disablednphy@fed90000rockchip,rk3588-usbdp-phy+!!m!Wrefclkimmortalpclkutmi(!!!!!initcmnlanepcs_apbpma_apb C V gh disabledphy@fee10000rockchip,rk3588-naneng-combphy+!!w!W refapbpipek!{!=!Dphyapb },   disabledphy@fee80000rockchip,rk3588-pcie3-phy+!ypclk!Hphy }, {! disabled opp-table-cluster0operating-points-v2  opp-1008000000 < L L~ @opp-1200000000 G 4 4~ @opp-1416000000 Tfr ~ @ opp-1608000000 _" P P~ @opp-1800000000 kI ~~~ @opp-table-cluster1operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-cluster2operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-gpuoperating-points-v2#opp-300000000  L L Popp-400000000 ׄ L L Popp-500000000 e L L Popp-600000000 #F L L Popp-700000000 )' ` ` Popp-800000000 / q q Popp-900000000 5 5 5 Popp-1000000000 ; P P Pchosen serial2:1500000n8adc-keys adc-keys " buttons w@ dbutton-vol-up Volume Up s +Bhbutton-vol-down Volume Down r +\button-menu Menu  + button-escape Escape  +8backlightpwm-backlight E# R$aregulator-pcie20-avdd0v85regulator-fixedpcie20_avdd0v85+= PU P%regulator-pcie20-avdd1v8regulator-fixedpcie20_avdd1v8+=w@Uw@&regulator-pcie30-avdd0v75regulator-fixedpcie30_avdd0v75+= qU q'regulator-pcie30-avdd1v8regulator-fixedpcie30_avdd1v8+=w@Uw@&regulator-vcc12v-dcinregulator-fixed vcc12v_dcin+=U#regulator-vcc5v0-hostregulator-fixed W jdefault( vcc5v0_host+=LK@ULK@)+regulator-vcc5v0-sysregulator-fixed vcc5v0_sys+=LK@ULK@#.regulator-vcc5v0-usbdcinregulator-fixedvcc5v0_usbdcin+=LK@ULK@#*regulator-vcc5v0-usbregulator-fixed vcc5v0_usb+=LK@ULK@*)regulator-vcc-1v1-nldo-s3regulator-fixedvcc_1v1_nldo_s3+=U. compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0cpudevice_typeregenable-methodcapacity-dmips-mhzclockscpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapalloc-rangesalignmentassigned-clocksassigned-clock-ratesclock-namespower-domainsdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosdomain-supplyreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsrockchip,vo-grfbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapiommu-mapnum-lanesinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdiono-sdnon-removablerockchip,trcm-sync-tx-onlydma-noncoherentmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellswakeup-sourcenum-csgpio-controller#gpio-cellsspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsmemory-regionclock_in_outphy-handlephy-moderx_delaytx_delayreset-assert-usreset-deassert-usreset-gpiosrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltpower-supplypwmsenable-active-highgpio