w8(  ',friendlyarm,nanopi-r5crockchip,rk35687FriendlyElec NanoPi R5Caliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe310000/i2c@fe5e0000/rtc@51cpus cpu@0cpu,arm,cortex-a55psci -@?LY@kx cpu@100cpu,arm,cortex-a55psci -@?LY@kx cpu@200cpu,arm,cortex-a55psci -@?LY@kx cpu@300cpu,arm,cortex-a55psci -@?LY@kx l3-cache,cache"/@Adisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcЂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s8okaysimple-audio-card,codec?simple-audio-card,cpu? pmu,arm,cortex-a55-pmu0IT psci ,arm,psci-1.0smcreserved-memory gshmem@10f000,arm,scmi-shmemntimer,arm,armv8-timer0I   uxin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob I_ sata-phy 8disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob I` sata-phy 8disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Iref_clksuspend_clkbus_clkhost  utmi_wide8okay usb2-phyusb3-phy3usb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Iref_clksuspend_clkbus_clkhost usb2-phyusb3-phy  utmi_wide8okayinterrupt-controller@fd400000 ,arm,gic-v3 @F I :O`Aj(ug msi-controller@fd440000,arm,gic-v3-itsDuZusb@fd800000 ,generic-ehci Iusb8okayusb@fd840000 ,generic-ohci Iusb8okayusb@fd880000 ,generic-ehci Iusb8okayusb@fd8c0000 ,generic-ohci Iusb8okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdXio-domains&,rockchip,rk3568-pmu-io-voltage-domain8okaysyscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucruclock-controller@fdd20000,rockchip,rk3568-cruxin24m ,G AX i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c I.- i2cpclk!default 8okayregulator@1c ,tcs,tcs4525evdd_cpu 50"regulator-state-mempmic@20,rockchip,rk809 #Idefault$ 8%D%P%\%h%t%%%%regulatorsDCDC_REG1 vdd_logic pqregulator-state-memDCDC_REG2vdd_gpu pqGregulator-state-memDCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-memDCDC_REG5vcc_1v8w@w@regulator-state-memLDO_REG1vdda0v9_image~~Tregulator-state-memLDO_REG2 vdda_0v9  regulator-state-memLDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-memLDO_REG5 vccio_sdw@2Zregulator-state-memLDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-memLDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@Uregulator-state-memSWITCH_REG1vcc_3v3regulator-state-memSWITCH_REG2 vcc3v3_sd]regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart It ,baudclkapb_pclk&&'default 8disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default 8disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk)default 8disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default 8disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk+default 8disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller$ power-domain@78,$power-domain@8 8-./$power-domain@9  8012$power-domain@10 8345678$power-domain@11 89$power-domain@13 8:$power-domain@14 8;<=$power-domain@15 8>?@ABCDE$gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$I()' ?jobmmugpugpubus8okayFOGvideo-codec@fdea0400,rockchip,rk3568-vpu I?vdpu aclkhclk[H iommu@fdea0800,rockchip,rk3568-iommu@ I aclkiface bHrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga IZaclkhclksclk&$% ocoreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu I@ aclkhclk[I iommu@fdee0800,rockchip,rk3568-iommu@ I? aclkiface bImmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Id biuciuciu-driveciu-sample{рoreset 8disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aI ?macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref ostmmacethX JKL 8disabledmdio,snps,dwmac-mdio stmmac-axi-configJrx-queues-configKqueue0tx-queues-config$Lqueue0vop@fe040000 0@:vopgamma-lut I(%aclkhclkdclk_vp0dclk_vp1dclk_vp2[M X 8okay,rockchip,rk3568-vopAports port@0 endpoint@2DNVport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? I aclkifaceb 8okayMdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi IDpclkdphyO oapbX  8disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi IEpclkdphyP oapbX  8disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  I-((iahbisfrcecrefdefault QRS X T8okayeTuUports port@0endpointDVNport@1endpointDWqos@fe128000,rockchip,rk3568-qossyscon ,qos@fe138080,rockchip,rk3568-qossyscon ;qos@fe138100,rockchip,rk3568-qossyscon <qos@fe138180,rockchip,rk3568-qossyscon =qos@fe148000,rockchip,rk3568-qossyscon -qos@fe148080,rockchip,rk3568-qossyscon .qos@fe148100,rockchip,rk3568-qossyscon /qos@fe150000,rockchip,rk3568-qossyscon 9qos@fe158000,rockchip,rk3568-qossyscon 3qos@fe158100,rockchip,rk3568-qossyscon 4qos@fe158180,rockchip,rk3568-qossyscon 5qos@fe158200,rockchip,rk3568-qossyscon 6qos@fe158280,rockchip,rk3568-qossyscon 7qos@fe158300,rockchip,rk3568-qossyscon 8qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon >qos@fe190280,rockchip,rk3568-qossyscon Bqos@fe190300,rockchip,rk3568-qossyscon Cqos@fe190380,rockchip,rk3568-qossyscon Dqos@fe190400,rockchip,rk3568-qossyscon Eqos@fe198000,rockchip,rk3568-qossyscon :qos@fe1a8000,rockchip,rk3568-qossyscon 0qos@fe1a8080,rockchip,rk3568-qossyscon 1qos@fe1a8100,rockchip,rk3568-qossyscon 2dfi@fe230000,rockchip,rk3568-dfi# I Xpcie@fe260000,rockchip,rk3568-pcie0@&:dbiapbconfig<IKJIHG?syspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpciO`YYYYZ pcie-phyTg @@opipe 8okaydefault[  \legacy-interrupt-controllerO: IHYmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Ib biuciuciu-driveciu-sample{рoreset8okay!(2DU`]ldefault^_`ammc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Ic biuciuciu-driveciu-sample{рoreset 8disabledspi@fe300000 ,rockchip,sfc0@ Iexvclk_sfchclk_sfcbdefault 8disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 I{}, n6(|zy{}corebusaxiblocktimer8okay( ydefaultcdef`lrng@fe388000,rockchip,rk3568-rng8@po coreahbm8okayi2s@fe400000,rockchip,rk3568-i2s-tdm@ I4=A,FqFq?C9mclk_txmclk_rxhclkgtxPQ otx-mrx-mX T8okay i2s@fe410000,rockchip,rk3568-i2s-tdmA I5EI,FqFqGK:mclk_txmclk_rxhclkggrxtxRS otx-mrx-mX default0hijklmnopqrsT 8disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB I6M,FqOO;mclk_txmclk_rxhclkggtxrxTotx-mX defaulttuvwT 8disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC I7SW<mclk_txmclk_rxhclkggtxrxUV otx-mrx-mX T 8disabledpdm@fe440000,rockchip,rk3568-pdmD ILZYpdm_clkpdm_hclkg rxxyz{|}defaultXopdm-mT 8disabledspdif@fe460000,rockchip,rk3568-spdifF If mclkhclk_\gtxdefault~T 8disableddma-controller@fe530000,arm,pl330arm,primecellS@I   apb_pclk&dma-controller@fe550000,arm,pl330arm,primecellU@I  apb_pclkgi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ I/HG i2cpclkdefault  8disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ I0JI i2cpclkdefault  8disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ I1LK i2cpclkdefault  8disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] I2NM i2cpclkdefault  8disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ I3PO i2cpclkdefault 8okayrtc@51,haoyu,hym8563Q#I rtcic_32koutdefaultwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` I tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia IgRQspiclkapb_pclk&&txrxdefault   8disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib IhTSspiclkapb_pclk&&txrxdefault   8disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic IiVUspiclkapb_pclk&&txrxdefault   8disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid IjXWspiclkapb_pclk&&txrxdefault   8disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Iubaudclkapb_pclk&&default 8disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Iv# baudclkapb_pclk&&default8okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Iw'$baudclkapb_pclk&&default 8disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Ix+(baudclkapb_pclk&& default 8disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Iy/,baudclkapb_pclk& & default 8disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Iz30baudclkapb_pclk& & default 8disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk I{74baudclkapb_pclk&&default 8disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl I|;8baudclkapb_pclk&&default 8disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm I}?<baudclkapb_pclk&&default 8disabledthermal-zonescpu-thermaldtripscpu_alert0p passivecpu_alert1$ passivecpu_crits  criticalcooling-mapsmap0 0  gpu-thermaltripsgpu-thresholdp passivegpu-target$ passivegpu-crits  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq Is,f@ `tsadcapb_pclkX  !sdefaultsleep 8 B8okay X osaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr I]saradcapb_pclk osaradc-apb 8okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault 8disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault 8disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault 8disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault 8disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault 8disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault 8disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault 8disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault 8disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault 8disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault 8disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault 8disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault 8disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe",ophy   8okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe%,ophy   8okayphy@fe870000,rockchip,rk3568-csi-dphyypclk oapbX  8disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  oapb 8disabledOmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  oapb 8disabledPusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m I 8okayhost-port 8okay otg-port 8okayusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m I 8okayhost-port 8okay otg-port 8okaypinctrl,rockchip,rk3568-pinctrlX X ggpio@fdd60000,rockchip,gpio-bank I!.     :O#gpio@fe740000,rockchip,gpio-bankt I"cd    :Ogpio@fe750000,rockchip,gpio-banku I#ef  @  :Ogpio@fe760000,rockchip,gpio-bankv I$gh  `  :O\gpio@fe770000,rockchip,gpio-bankw I%ij    :Opcfg-pull-up pcfg-pull-none +pcfg-pull-none-drv-level-1 + 8pcfg-pull-none-drv-level-2 + 8pcfg-pull-none-drv-level-3 + 8pcfg-pull-up-drv-level-1  8pcfg-pull-up-drv-level-2  8pcfg-pull-none-smt + Gacodecaudiopwmbt656bt1120camcan0can0m0-pins \  can1can1m0-pins \can2can2m0-pins \  cifclk32kclk32k-out0 \cpuebcedpdpemmcemmc-bus8 \  cemmc-clk \demmc-cmd \eemmc-datastrobe \feth0eth1flashfspifspi-pins` \bgmac0gmac1gpuhdmitxhdmitxm0-cec \Shdmitx-scl \Qhdmitx-sda \Ri2c0i2c0-xfer \  !i2c1i2c1-xfer \  i2c2i2c2m0-xfer \ i2c3i2c3m0-xfer \i2c4i2c4m0-xfer \  i2c5i2c5m0-xfer \  i2s1i2s1m0-lrckrx \ki2s1m0-lrcktx \ji2s1m0-sclkrx \ii2s1m0-sclktx \hi2s1m0-sdi0 \ li2s1m0-sdi1 \ mi2s1m0-sdi2 \ ni2s1m0-sdi3 \oi2s1m0-sdo0 \pi2s1m0-sdo1 \qi2s1m0-sdo2 \ ri2s1m0-sdo3 \ si2s2i2s2m0-lrcktx \ui2s2m0-sclktx \ti2s2m0-sdi \vi2s2m0-sdo \wi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk \xpdmm0-clk1 \ypdmm0-sdi0 \ zpdmm0-sdi1 \ {pdmm0-sdi2 \ |pdmm0-sdi3 \}pmicpmic-int \$pmupwm0pwm0m0-pins \(pwm1pwm1m0-pins \)pwm2pwm2m0-pins \*pwm3pwm3-pins \+pwm4pwm4-pins \pwm5pwm5-pins \pwm6pwm6-pins \pwm7pwm7-pins \pwm8pwm8m0-pins \ pwm9pwm9m0-pins \ pwm10pwm10m0-pins \ pwm11pwm11m0-pins \pwm12pwm12m0-pins \pwm13pwm13m0-pins \pwm14pwm14m0-pins \pwm15pwm15m0-pins \refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ \^sdmmc0-clk \_sdmmc0-cmd \`sdmmc0-det \asdmmc1sdmmc2spdifspdifm0-tx \~spi0spi0m0-pins0 \ spi0m0-cs0 \spi0m0-cs1 \spi1spi1m0-pins0 \ spi1m0-cs0 \spi1m0-cs1 \spi2spi2m0-pins0 \spi2m0-cs0 \spi2m0-cs1 \spi3spi3m0-pins0 \  spi3m0-cs0 \spi3m0-cs1 \tsadctsadc-shutorg \tsadc-pin \uart0uart0-xfer \'uart1uart1m0-xfer \  uart2uart2m0-xfer \uart3uart3m0-xfer \uart4uart4m0-xfer \uart5uart5m0-xfer \uart6uart6m0-xfer \uart7uart7m0-xfer \uart8uart8m0-xfer \uart9uart9m0-xfer \vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2hym8563hym8563-int \usbvcc5v0-usb-host-en \vcc5v0-usb-otg-en \gpio-ledslan-led-pin \power-led-pin \wan-led-pin \wlan-led-pin \pciepcie20-reset-pin \[rockchip-keyreset-button-pin \opp-table-0,operating-points-v2 jopp-408000000 uQ | P P0 @opp-600000000 u#F | P P0 @opp-816000000 u0, | P P0 @ opp-1104000000 uAʹ | 0 @opp-1416000000 uTfr |0 @opp-1608000000 u_" |0 @opp-1800000000 ukI |000 @opp-1992000000 uv |000 @opp-table-1,operating-points-v2Fopp-200000000 u  | P PB@opp-300000000 u | P PB@opp-400000000 uׄ | P PB@opp-600000000 u#F | B@opp-700000000 u)' |~~B@opp-800000000 u/ |B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob I^ sata-phy 8disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon ?qos@fe190100,rockchip,rk3568-qossyscon @qos@fe190200,rockchip,rk3568-qossyscon Asyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclkophy 8okay pcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<I?syspmcmsglegacyerrO`Z pcie-phy0@@'Tg @@@:dbiapbconfigopipe8okay  # legacy-interrupt-controller:O Ipcie@fe280000,rockchip,rk3568-pcie  /($aclk_mstaclk_slvaclk_dbipclkauxpci<I?syspmcmsglegacyerrO` Z  pcie-phy0@(Tg @@:dbiapbconfigopipe8okay  # legacy-interrupt-controller:O Iethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*I?macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref ostmmacethX  8disabledmdio,snps,dwmac-mdio stmmac-axi-configrx-queues-configqueue0tx-queues-config$queue0can@fe570000,rockchip,rk3568v2-canfdW IA@ baudpclkUT ocoreapbdefault 8disabledcan@fe580000,rockchip,rk3568v2-canfdX ICB baudpclkWV ocoreapbdefault 8disabledcan@fe590000,rockchip,rk3568v2-canfdY IED baudpclkYX ocoreapbdefault 8disabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe,ophy   8okaychosen serial2:1500000n8adc-keys ,adc-keys  buttons w@ dbutton-maskrom $MASKROM * 5hdmi-con,hdmi-connectoraportendpointDWregulator-vdd-usbc,regulator-fixed vdd_usbcLK@LK@regulator-vcc3v3-sys,regulator-fixed vcc3v3_sys2Z2Z%regulator-vcc5v0-sys,regulator-fixed vcc5v0_sysLK@LK@"regulator-vcc3v3-pcie,regulator-fixed vcc3v3_pcie2Z2Z O # b @"regulator-vcc5v0-usb,regulator-fixed vcc5v0_usbLK@LK@regulator-vcc5v0-usb-host,regulator-fixed O s#defaultvcc5v0_usb_hostLK@LK@regulator-vcc5v0-usb-otg,regulator-fixed O s#defaultvcc5v0_usb_otgLK@LK@regulator-pcie30-avdd0v9,regulator-fixedpcie30_avdd0v9  %regulator-pcie30-avdd1v8,regulator-fixedpcie30_avdd1v8w@w@%gpio-keys ,gpio-keysdefaultbutton-reset x2 # $reset *gpio-leds ,gpio-ledsdefaultled-lan  lan \led-power  power heartbeat \led-wan  wan \led-wlan  wlan \ interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1rtc0device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosno-sdiono-mmcbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplymmc-hs200-1_8vnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfdata-lanesvpcie3v3-supplystdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltenable-active-highstartup-delay-usgpiodebounce-intervalcolorfunctionlinux,default-trigger