8( Ϩ ,radxa,rock-3crockchip,rk35667Radxa ROCK 3Caliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe010000/mmc@fe310000/mmc@fe2b0000/mmc@fe2c0000cpus cpu@0cpu,arm,cortex-a55 psci*7@IVc@u cpu@100cpu,arm,cortex-a55 psci*7@IVc@u cpu@200cpu,arm,cortex-a55 psci*7@IVc@u cpu@300cpu,arm,cortex-a55 psci*7@IVc@u l3-cache,cache,9@Kdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcڂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s(Bokaysimple-audio-card,codecIsimple-audio-card,cpuI pmu,arm,cortex-a55-pmu0S^ psci ,arm,psci-1.0#smcreserved-memory qshmem@10f000,arm,scmi-shmemxtimer,arm,armv8-timer0S   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob S_ sata-phy Bdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob S` sata-phy Bdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Sref_clksuspend_clkbus_clk host utmi_wide$Bokay usb2-phy= Dhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Sref_clksuspend_clkbus_clk host usb2-phyusb3-phy utmi_wide$Bokayinterrupt-controller@fd400000 ,arm,gic-v3 @F S RgxA(q msi-controller@fd440000,arm,gic-v3-itsDausb@fd800000 ,generic-ehci SusbBokayusb@fd840000 ,generic-ohci SusbBokayusb@fd880000 ,generic-ehci SusbBokayusb@fd8c0000 ,generic-ohci SusbBokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd_io-domains&,rockchip,rk3568-pmu-io-voltage-domainBokay 'syscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru5clock-controller@fdd20000,rockchip,rk3568-cruxin24m5B RG g~ i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c S.- i2cpclk!default Bokayregulator@1c ,tcs,tcs4525vdd_cpu 50 ""regulator-state-mem-pmic@20,rockchip,rk809 #Srk808-clkout1rk808-clkout2default$%F^&j&v&&&&&&&regulatorsDCDC_REG1 vdd_logic p qregulator-state-mem- DCDC_REG2vdd_gpu p qEregulator-state-mem- DCDC_REG3vcc_ddrregulator-state-mem DCDC_REG4vdd_npu p qregulator-state-mem-DCDC_REG5vcc_1v8w@w@regulator-state-mem-LDO_REG1vdda0v9_image  [regulator-state-mem-LDO_REG2 vdda_0v9  regulator-state-mem-LDO_REG3 vdda0v9_pmu  regulator-state-mem  LDO_REG4 vccio_acodec2Z2Zregulator-state-mem-LDO_REG5 vccio_sdw@2Zregulator-state-mem-LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem 2ZLDO_REG7 vcca_1v8w@w@regulator-state-mem-LDO_REG8 vcca1v8_pmuw@w@regulator-state-mem w@LDO_REG9vcca1v8_imagew@w@\regulator-state-mem-SWITCH_REG1vcc_3v3regulator-state-mem-SWITCH_REG2 vcc3v3_sdregulator-state-mem-eeprom@50,belling,bl24c16aatmel,24c16P#serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart St ,baudclkapb_pclk,''(default1> Bdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk)defaultH Bdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk*defaultH Bdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk+defaultH Bdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk,defaultH Bdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllerS power-domain@7g-Spower-domain@8 g./0Spower-domain@9  g123Spower-domain@10 g456789Spower-domain@11 g:Spower-domain@13 g;Spower-domain@14 g<=>Spower-domain@15g?@ABCSgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$S()' njobmmugpugpubus BokayD~Evideo-codec@fdea0400,rockchip,rk3568-vpu Snvdpu aclkhclkF iommu@fdea0800,rockchip,rk3568-iommu@ S aclkiface Frga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga SZaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu S@ aclkhclkG iommu@fdee0800,rockchip,rk3568-iommu@ S? aclkiface Gmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Sd biuciuciu-driveciu-sampleрreset Bdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aS nmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmaceth~ HIJ BokayB gKinput L +rgmii-id4defaultMNOPQRmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22?N O aSLstmmac-axi-configmwHrx-queues-configIqueue0tx-queues-configJqueue0vop@fe040000 0@vopgamma-lut S(%aclkhclkdclk_vp0dclk_vp1dclk_vp2T ~ Bokay,rockchip,rk3566-vopBgports port@0 endpoint@2U]port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? S aclkiface BokayTdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi SDpclkdphyV apb~  Bdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi SEpclkdphyW apb~  Bdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  S-((iahbisfrcecrefdefault XYZ 1~ Bokay[\ports port@0endpoint]Uport@1endpoint^qos@fe128000,rockchip,rk3568-qossyscon -qos@fe138080,rockchip,rk3568-qossyscon <qos@fe138100,rockchip,rk3568-qossyscon =qos@fe138180,rockchip,rk3568-qossyscon >qos@fe148000,rockchip,rk3568-qossyscon .qos@fe148080,rockchip,rk3568-qossyscon /qos@fe148100,rockchip,rk3568-qossyscon 0qos@fe150000,rockchip,rk3568-qossyscon :qos@fe158000,rockchip,rk3568-qossyscon 4qos@fe158100,rockchip,rk3568-qossyscon 5qos@fe158180,rockchip,rk3568-qossyscon 6qos@fe158200,rockchip,rk3568-qossyscon 7qos@fe158280,rockchip,rk3568-qossyscon 8qos@fe158300,rockchip,rk3568-qossyscon 9qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon ?qos@fe190280,rockchip,rk3568-qossyscon @qos@fe190300,rockchip,rk3568-qossyscon Aqos@fe190380,rockchip,rk3568-qossyscon Bqos@fe190400,rockchip,rk3568-qossyscon Cqos@fe198000,rockchip,rk3568-qossyscon ;qos@fe1a8000,rockchip,rk3568-qossyscon 1qos@fe1a8080,rockchip,rk3568-qossyscon 2qos@fe1a8100,rockchip,rk3568-qossyscon 3dfi@fe230000,rockchip,rk3568-dfi# S _pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<SKJIHGnsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpcig%`8````FWfua pcie-phyTq @@pipe Bokaydefaultb ac dlegacy-interrupt-controllergR SH`mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Sb biuciuciu-driveciu-sampleрresetBokaydefaultefgh&mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Sc biuciuciu-driveciu-sampleрresetBokay i default jkl .&spi@fe300000 ,rockchip,sfc0@ Sexvclk_sfchclk_sfcmdefaultBokay flash@0,jedec,spi-nor <2 N _ pmmc@fe310000,rockchip,rk3568-dwcmshc1 SB{}R n6(|zy{}corebusaxiblocktimerBokay  { defaultnopqrng@fe388000,rockchip,rk3568-rng8@po coreahbm Bdisabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ S4B=ARFqFq?C9mclk_txmclk_rxhclk,r txPQ tx-mrx-m~ Bokay i2s@fe410000,rockchip,rk3568-i2s-tdmA S5BEIRFqFqGK:mclk_txmclk_rxhclk,rr rxtxRS tx-mrx-m~ defaultstuvBokay i2s@fe420000,rockchip,rk3568-i2s-tdmB S6BMRFqOO;mclk_txmclk_rxhclk,rr txrxTtx-m~ defaultwxyz Bdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC S7SW<mclk_txmclk_rxhclk,rr txrxUV tx-mrx-m~  Bdisabledpdm@fe440000,rockchip,rk3568-pdmD SLZYpdm_clkpdm_hclk,r  rx{|}~defaultXpdm-m Bdisabledspdif@fe460000,rockchip,rk3568-spdifF Sf mclkhclk_\,r txdefault Bdisableddma-controller@fe530000,arm,pl330arm,primecellS@S    apb_pclk 'dma-controller@fe550000,arm,pl330arm,primecellU@S   apb_pclk ri2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ S/HG i2cpclkdefault  Bdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ S0JI i2cpclkdefault  Bdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ S1LK i2cpclkdefault  Bdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] S2NM i2cpclkdefault  Bdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ S3PO i2cpclkdefault  Bdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` S tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia SgRQspiclkapb_pclk,'' txrxdefault   Bdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib ShTSspiclkapb_pclk,'' txrxdefault   Bdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic SiVUspiclkapb_pclk,'' txrxdefault   Bdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid SjXWspiclkapb_pclk,'' txrxdefault   Bdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Subaudclkapb_pclk,'' default1>Bokayserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Sv# baudclkapb_pclk,''default1>Bokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Sw'$baudclkapb_pclk,''default1> Bdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Sx+(baudclkapb_pclk,'' default1> Bdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Sy/,baudclkapb_pclk,' ' default1> Bdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Sz30baudclkapb_pclk,' ' default1> Bdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk S{74baudclkapb_pclk,''default1> Bdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl S|;8baudclkapb_pclk,''default1> Bdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm S}?<baudclkapb_pclk,''default1> Bdisabledthermal-zonescpu-thermal d  tripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0 ! gpu-thermal   tripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0  !tsadc@fe710000,rockchip,rk3568-tsadcq SsBRf@ `tsadcapb_pclk~  0sdefaultsleep G QBokay g ~saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr S]saradcapb_pclk saradc-apb Bokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultH Bdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultH Bdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultH Bdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefaultH Bdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultH Bdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultH Bdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultH Bdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefaultH Bdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultH Bdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultH Bdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaultH Bdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefaultH Bdisabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipeB"Rphy   Bokayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipeB%Rphy   Bokayphy@fe870000,rockchip,rk3568-csi-dphyypclk apb~  Bdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  apb BdisabledVmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  apb BdisabledWusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m S Bokayhost-port Bokay4otg-port Bokay4usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m S Bokayhost-port Bokay4otg-port Bokay4pinctrl,rockchip,rk3568-pinctrl~ _ qgpio@fdd60000,rockchip,gpio-bank S!.    Rg#gpio@fe740000,rockchip,gpio-bankt S"cd   Rgcgpio@fe750000,rockchip,gpio-banku S#ef  @  Rggpio@fe760000,rockchip,gpio-bankv S$gh  `  RgSgpio@fe770000,rockchip,gpio-bankw S%ij   Rgpcfg-pull-up "pcfg-pull-none /pcfg-pull-none-drv-level-1 / <pcfg-pull-none-drv-level-2 / <pcfg-pull-none-drv-level-3 / <pcfg-pull-up-drv-level-1 " <pcfg-pull-up-drv-level-2 " <pcfg-pull-none-smt / Kacodecaudiopwmbt656bt1120camvcc_cam_en `can0can1can2cifclk32kclk32k-out0 `cpuebcedpdpemmcemmc-bus8 `  nemmc-clk `oemmc-cmd `pemmc-datastrobe `qeth0eth1flashfspifspi-pins` `mgmac0gmac1gmac1m1-miim `Mgmac1m1-clkinout `Rgmac1m1-rx-bus20 ` Ogmac1m1-tx-bus20 `Ngmac1m1-rgmii-clk `Pgmac1m1-rgmii-bus@ `Qgpuhdmitxhdmitxm0-cec `Zhdmitx-scl `Xhdmitx-sda `Yi2c0i2c0-xfer `  !i2c1i2c1-xfer `  i2c2i2c2m0-xfer ` i2c3i2c3m0-xfer `i2c4i2c4m0-xfer `  i2c5i2c5m0-xfer `  i2s1i2s1m0-lrcktx `ti2s1m0-mclk `%i2s1m0-sclktx `si2s1m0-sdi0 ` ui2s1m0-sdo0 `vi2s2i2s2m0-lrcktx `xi2s2m0-sclktx `wi2s2m0-sdi `yi2s2m0-sdo `zi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk `{pdmm0-clk1 `|pdmm0-sdi0 ` }pdmm0-sdi1 ` ~pdmm0-sdi2 ` pdmm0-sdi3 `pmicpmic-int-l `$pmupwm0pwm0m0-pins `)pwm1pwm1m0-pins `*pwm2pwm2m0-pins `+pwm3pwm3-pins `,pwm4pwm4-pins `pwm5pwm5-pins `pwm6pwm6-pins `pwm7pwm7-pins `pwm8pwm8m0-pins ` pwm9pwm9m0-pins ` pwm10pwm10m0-pins ` pwm11pwm11m0-pins `pwm12pwm12m0-pins `pwm13pwm13m0-pins `pwm14pwm14m0-pins `pwm15pwm15m0-pins `refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ `esdmmc0-clk `fsdmmc0-cmd `gsdmmc0-det `hsdmmc1sdmmc1-bus4@ `jsdmmc1-clk `ksdmmc1-cmd `lsdmmc2spdifspdifm0-tx `spi0spi0m0-pins0 ` spi0m0-cs0 `spi0m0-cs1 `spi1spi1m0-pins0 ` spi1m0-cs0 `spi1m0-cs1 `spi2spi2m0-pins0 `spi2m0-cs0 `spi2m0-cs1 `spi3spi3m0-pins0 `  spi3m0-cs0 `spi3m0-cs1 `tsadctsadc-shutorg `tsadc-pin `uart0uart0-xfer `(uart1uart1m0-xfer `  uart1m0-ctsn `uart1m0-rtsn ` uart2uart2m0-xfer `uart3uart3m0-xfer `uart4uart4m0-xfer `uart5uart5m0-xfer `uart6uart6m0-xfer `uart7uart7m0-xfer `uart8uart8m0-xfer `uart9uart9m0-xfer `vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2bluetoothbt-reg-on-h `bt-wake-host-h ` bt-host-wake-h ` displayvcc_mipi_en `ledsuser-led2 `pciepcie-pwr-en `pcie-reset-h ` busbvcc5v0-usb30-host-en `vcc5v0-usb-otg-en `wifiwifi-host-wake-h `wifi-reg-on-h `opp-table-0,operating-points-v2 nopp-408000000 yQ P P0 @opp-600000000 y#F P P0 @opp-816000000 y0, P P0 @ opp-1104000000 yAʹ 0 @opp-1416000000 yTfr 0 @opp-table-1,operating-points-v2Dopp-200000000 y  P PB@opp-300000000 y P PB@opp-400000000 yׄ P PB@opp-600000000 y#F B@opp-700000000 y)' ~~B@chosen serial2:1500000n8external-gmac1-clock ,fixed-clocksY@ gmac1_clkinKhdmi-con,hdmi-connectoraportendpoint^leds ,gpio-ledsled-0 g# heartbeat  heartbeatdefaultsdio-pwrseq,mmc-pwrseq-simple ext_clockdefault d LK@ a#iregulator-vcc5v-dcin,regulator-fixed vcc5v_dcinLK@LK@regulator-vcc3v3-pcie,regulator-fixed  g#default vcc3v3_pcie2Z2Z"&dregulator-vcc3v3-sys,regulator-fixed vcc3v3_sys2Z2Z""&regulator-vcc5v0-sys,regulator-fixed vcc5v0_sysLK@LK@""regulator-vcc5v0-usb30-host,regulator-fixed  #defaultvcc5v0_usb30_hostLK@LK@""regulator-vcc5v0-usb-otg,regulator-fixed  #defaultvcc5v0_usb_otgLK@LK@""regulator-vcc-cam,regulator-fixed  #defaultvcc_cam2Z2Z"&regulator-state-mem-regulator-vcc-mipi,regulator-fixed  #default vcc_mipi2Z2Z"&regulator-state-mem- interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-suspend-microvoltregulator-on-in-suspendpagesizedmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modephy-supplyreset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesvpcie3v3-supplybus-widthcap-sd-highspeeddisable-wpsd-uhs-sdr50vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104spi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthvcc-supplymmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathfunctioncolorlinux,default-triggerpost-power-on-delay-mspower-off-delay-usenable-active-highgpio