܇8М( d ',radxa,cm3-ioradxa,cm3rockchip,rk3566%7Radxa Compute Module 3(CM3) IO Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe310000/ethernet@fe010000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55psci%2@DQ^@p} cpu@100cpu,arm,cortex-a55psci%2@DQ^@p} cpu@200cpu,arm,cortex-a55psci%2@DQ^@p} cpu@300cpu,arm,cortex-a55psci%2@DQ^@p} l3-cache,cache'4@Fdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcՂ protocol@14hdmi-sound,simple-audio-cardHDMI i2s#=okaysimple-audio-card,codecDsimple-audio-card,cpuD pmu,arm,cortex-a55-pmu0NY psci ,arm,psci-1.0smcreserved-memory lshmem@10f000,arm,scmi-shmemstimer,arm,armv8-timer0N   zxin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob N_ sata-phy =disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob N` sata-phy =disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Nref_clksuspend_clkbus_clkotg utmi_wide=okay usb2-phy8 ?high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Nref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide=okayinterrupt-controller@fd400000 ,arm,gic-v3 @F N MbsA}(l msi-controller@fd440000,arm,gic-v3-itsD^usb@fd800000 ,generic-ehci Nusb=okayusb@fd840000 ,generic-ohci Nusb =disabledusb@fd880000 ,generic-ehci Nusb =disabledusb@fd8c0000 ,generic-ohci Nusb =disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd\io-domains&,rockchip,rk3568-pmu-io-voltage-domain=okay"syscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru0clock-controller@fdd20000,rockchip,rk3568-cruxin24m0= MG byi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c N.- i2cpclk default =okayregulator@1c ,tcs,tcs4525vdd_cpu 45!regulator-state-mem(pmic@20,rockchip,rk817 rk817-clkout1rk817-clkout2"Ndefault#AYg!s!!!!!!regulatorsDCDC_REG1 vdd_logic pqregulator-state-mem DCDC_REG2 vdd_gpu_npu pqBregulator-state-mem(DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4 vcc3v3_sys2Z2Zregulator-state-mem2ZLDO_REG1 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG2 vdda_0v9  regulator-state-mem(LDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-mem(LDO_REG5 vccio_sdw@2Zregulator-state-mem(LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcc_1v8_pw@w@regulator-state-mem(LDO_REG8 vcc1v8_dvpw@w@regulator-state-mem(LDO_REG9 vcc2v8_dvp**regulator-state-mem(serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Nt ,baudclkapb_pclk$$%default  =disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk&default" =disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'default" =disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk(default" =disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk)default" =disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller- power-domain@7A*-power-domain@8 A+,--power-domain@9  A./0-power-domain@10 A123456-power-domain@11 A7-power-domain@13 A8-power-domain@14 A9:;-power-domain@15A<=>?@-gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$N()' Hjobmmugpugpubus=okayAXBvideo-codec@fdea0400,rockchip,rk3568-vpu NHvdpu aclkhclkdC iommu@fdea0800,rockchip,rk3568-iommu@ N aclkiface kCrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga NZaclkhclksclk&$% xcoreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu N@ aclkhclkdD iommu@fdee0800,rockchip,rk3568-iommu@ N? aclkiface kDmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Nd biuciuciu-driveciu-sampleрxreset =disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aN Hmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref xstmmacethyEFG=okay= bHMsY@inputIrgmiidefaultJKLMNO P 4N IFR.mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22Istmmac-axi-config[euErx-queues-configFqueue0tx-queues-configGqueue0vop@fe040000 0@vopgamma-lut N(%aclkhclkdclk_vp0dclk_vp1dclk_vp2dQ y=okay,rockchip,rk3566-vop=bports port@0 endpoint@2RZport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? N aclkifacek =okayQdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi NDpclkdphyS xapby =disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi NEpclkdphyT xapby =disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  N-((iahbisfrcecrefdefault UVW  y=okayXYports port@0endpointZRport@1endpoint[qos@fe128000,rockchip,rk3568-qossyscon *qos@fe138080,rockchip,rk3568-qossyscon 9qos@fe138100,rockchip,rk3568-qossyscon :qos@fe138180,rockchip,rk3568-qossyscon ;qos@fe148000,rockchip,rk3568-qossyscon +qos@fe148080,rockchip,rk3568-qossyscon ,qos@fe148100,rockchip,rk3568-qossyscon -qos@fe150000,rockchip,rk3568-qossyscon 7qos@fe158000,rockchip,rk3568-qossyscon 1qos@fe158100,rockchip,rk3568-qossyscon 2qos@fe158180,rockchip,rk3568-qossyscon 3qos@fe158200,rockchip,rk3568-qossyscon 4qos@fe158280,rockchip,rk3568-qossyscon 5qos@fe158300,rockchip,rk3568-qossyscon 6qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon <qos@fe190280,rockchip,rk3568-qossyscon =qos@fe190300,rockchip,rk3568-qossyscon >qos@fe190380,rockchip,rk3568-qossyscon ?qos@fe190400,rockchip,rk3568-qossyscon @qos@fe198000,rockchip,rk3568-qossyscon 8qos@fe1a8000,rockchip,rk3568-qossyscon .qos@fe1a8080,rockchip,rk3568-qossyscon /qos@fe1a8100,rockchip,rk3568-qossyscon 0dfi@fe230000,rockchip,rk3568-dfi# N \pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<NKJIHGHsyspmcmsglegacyerr ($aclk_mstaclk_slvaclk_dbipclkauxpcib`&]]]]4ETcr^z pcie-phyTl @@xpipe  =disabledlegacy-interrupt-controllerbM NH]mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Nb biuciuciu-driveciu-sampleрxreset=okaydefault_`abcmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Nc biuciuciu-driveciu-sampleрxreset=okay ddefault efg  wifi@1,brcm,bcm43455-fmachN Hhost-wakedefaultispi@fe300000 ,rockchip,sfc0@ Nexvclk_sfchclk_sfcjdefault =disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 N={}M n6(|zy{}corebusaxiblocktimer=okay  defaultklmn rng@fe388000,rockchip,rk3568-rng8@po coreahbm =disabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ N4==AMFqFq?C9mclk_txmclk_rxhclko .txPQ xtx-mrx-my =disabled i2s@fe410000,rockchip,rk3568-i2s-tdmA N5=EIMFqFqGK:mclk_txmclk_rxhclkoo .rxtxRS xtx-mrx-mydefault0pqrstuvwxyz{ =disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB N6=MMFqOO;mclk_txmclk_rxhclkoo .txrxTxtx-mydefault|}~ =disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC N7SW<mclk_txmclk_rxhclkoo .txrxUV xtx-mrx-my =disabledpdm@fe440000,rockchip,rk3568-pdmD NLZYpdm_clkpdm_hclko  .rxdefaultXxpdm-m =disabledspdif@fe460000,rockchip,rk3568-spdifF Nf mclkhclk_\o .txdefault =disableddma-controller@fe530000,arm,pl330arm,primecellS@N  8  apb_pclk O$dma-controller@fe550000,arm,pl330arm,primecellU@N 8  apb_pclk Ooi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ N/HG i2cpclkdefault  =disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ N0JI i2cpclkdefault  =disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ N1LK i2cpclkdefault  =disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] N2NM i2cpclkdefault  =disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ N3PO i2cpclkdefault  =disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` N tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia NgRQspiclkapb_pclk$$ .txrxdefault   =disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib NhTSspiclkapb_pclk$$ .txrxdefault   =disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic NiVUspiclkapb_pclk$$ .txrxdefault   =disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid NjXWspiclkapb_pclk$$ .txrxdefault   =disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Nubaudclkapb_pclk$$ default =okaybluetooth,brcm,bcm4345c5lpo Zh  nh default  h  serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Nv# baudclkapb_pclk$$default =okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Nw'$baudclkapb_pclk$$default  =disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Nx+(baudclkapb_pclk$$ default  =disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Ny/,baudclkapb_pclk$ $ default  =disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Nz30baudclkapb_pclk$ $ default  =disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk N{74baudclkapb_pclk$$default  =disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl N|;8baudclkapb_pclk$$default  =disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm N}?<baudclkapb_pclk$$default  =disabledthermal-zonescpu-thermal d  tripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0 gpu-thermal   tripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq Ns=Mf@ `tsadcapb_pclky sdefaultsleep  (=okay > Usaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr N]saradcapb_pclk xsaradc-apb p=okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault" =disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault" =disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault" =disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault" =disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault" =disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault" =disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault" =disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault" =disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault" =disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault" =disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault" =disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault" =disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe="Mxphy   =okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe=%Mxphy    =disabledphy@fe870000,rockchip,rk3568-csi-dphyypclk xapby =disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  xapb =disabledSmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  xapb =disabledTusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m N =okayhost-port =okay otg-port =okayusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m N =okayhost-port =okayotg-port =okaypinctrl,rockchip,rk3568-pinctrly\ lgpio@fdd60000,rockchip,gpio-bank N!.    Mb"gpio@fe740000,rockchip,gpio-bankt N"cd   Mbgpio@fe750000,rockchip,gpio-banku N#ef  @  Mbhgpio@fe760000,rockchip,gpio-bankv N$gh  `  Mbgpio@fe770000,rockchip,gpio-bankw N%ij   MbPpcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-none-drv-level-15  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  -acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 Bcpuebcedpdpemmcemmc-bus8 B  kemmc-clk Blemmc-cmd Bmemmc-datastrobe Bneth0eth1flashfspifspi-pins` Bjgmac0gmac1gmac1m0-miim BJgmac1m0-clkinout BOgmac1m0-rx-bus20 B   Lgmac1m0-tx-bus20 B Kgmac1m0-rgmii-clk BMgmac1m0-rgmii-bus@ BNgpuhdmitxhdmitxm0-cec BWhdmitx-scl BUhdmitx-sda BVi2c0i2c0-xfer B   i2c1i2c1-xfer B  i2c2i2c2m0-xfer B i2c3i2c3m0-xfer Bi2c4i2c4m0-xfer B  i2c5i2c5m0-xfer B  i2s1i2s1m0-lrckrx Bsi2s1m0-lrcktx Bri2s1m0-sclkrx Bqi2s1m0-sclktx Bpi2s1m0-sdi0 B ti2s1m0-sdi1 B ui2s1m0-sdi2 B vi2s1m0-sdi3 Bwi2s1m0-sdo0 Bxi2s1m0-sdo1 Byi2s1m0-sdo2 B zi2s1m0-sdo3 B {i2s2i2s2m0-lrcktx B}i2s2m0-sclktx B|i2s2m0-sdi B~i2s2m0-sdo Bi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk Bpdmm0-clk1 Bpdmm0-sdi0 B pdmm0-sdi1 B pdmm0-sdi2 B pdmm0-sdi3 Bpmicpmic-int-l B#pmupwm0pwm0m0-pins B&pwm1pwm1m0-pins B'pwm2pwm2m0-pins B(pwm3pwm3-pins B)pwm4pwm4-pins Bpwm5pwm5-pins Bpwm6pwm6-pins Bpwm7pwm7-pins Bpwm8pwm8m0-pins B pwm9pwm9m0-pins B pwm10pwm10m0-pins B pwm11pwm11m0-pins Bpwm12pwm12m0-pins Bpwm13pwm13m0-pins Bpwm14pwm14m0-pins Bpwm15pwm15m0-pins Brefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ B_sdmmc0-clk B`sdmmc0-cmd Basdmmc0-det Bbsdmmc0-pwren Bcsdmmc1sdmmc1-bus4@ Besdmmc1-clk Bfsdmmc1-cmd Bgsdmmc2spdifspdifm0-tx Bspi0spi0m0-pins0 B spi0m0-cs0 Bspi0m0-cs1 Bspi1spi1m0-pins0 B spi1m0-cs0 Bspi1m0-cs1 Bspi2spi2m0-pins0 Bspi2m0-cs0 Bspi2m0-cs1 Bspi3spi3m0-pins0 B  spi3m0-cs0 Bspi3m0-cs1 Btsadctsadc-shutorg Btsadc-pin Buart0uart0-xfer B%uart1uart1m0-xfer B  uart1m0-ctsn Buart1m0-rtsn B uart2uart2m0-xfer Buart3uart3m0-xfer Buart4uart4m0-xfer Buart5uart5m0-xfer Buart6uart6m0-xfer Buart7uart7m0-xfer Buart8uart8m0-xfer Buart9uart9m0-xfer Bvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2bluetoothbt-host-wake-h B bt-reg-on-h Bbt-wake-host-h B ledsuser-led2 Bpi-nled-activity Bwifiwifi-reg-on-h Bwifi-host-wake-h Bisdcardsdmmc-pwren Busbvcc5v0-host-en-h Bopp-table-0,operating-points-v2 Popp-408000000 [Q b P P0 p@opp-600000000 [#F b P P0 p@opp-816000000 [0, b P P0 p@ opp-1104000000 [Aʹ b 0 p@opp-1416000000 [Tfr b0 p@opp-1608000000 [_" b0 p@opp-1800000000 [kI b000 p@opp-table-1,operating-points-v2Aopp-200000000 [  b P PB@opp-300000000 [ b P PB@opp-400000000 [ׄ b P PB@opp-600000000 [#F b B@opp-700000000 [)' b~~B@opp-800000000 [/ bB@B@B@leds ,gpio-ledsled-0 h"  status timer ondefaultled-1 hP  activity heartbeatdefaultregulator-vcc-sys,regulator-fixedvcc_sysLK@LK@!regulator-vcc-1v8,regulator-fixedvcc_1v8w@w@regulator-vcc-3v3,regulator-fixedvcc_3v32Z2Zregulator-vcca-1v8,regulator-fixed vcca_1v8w@w@pwrseq-sdio,mmc-pwrseq-simple ext_clockdefault hdchosen serial2:1500000n8external-gmac1-clock ,fixed-clocksY@ gmac1_clkinHhdmi-con,hdmi-connectoraportendpoint[regulator-vcc5v0-usb30,regulator-fixed vcc5v0_usb30  defaultLK@LK@!regulator-vcca1v8-image,regulator-fixedvcca1v8_imagew@w@Yregulator-vdda0v9-image,regulator-fixedvcca0v9_image  X interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0ethernet0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaysnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104vmmc-supplymmc-hs200-1_8vdma-namesarm,pl330-periph-burst#dma-cellsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendcolorfunctionlinux,default-triggerdefault-statereset-gpiosstdout-pathenable-active-high