8( ֨  ,powkiddy,rk2023rockchip,rk35667handsetDPowkiddy RK2023aliasesJ/pinctrl/gpio@fdd60000P/pinctrl/gpio@fe740000V/pinctrl/gpio@fe750000\/pinctrl/gpio@fe760000b/pinctrl/gpio@fe770000h/i2c@fdd40000m/i2c@fe5a0000r/i2c@fe5b0000w/i2c@fe5c0000|/i2c@fe5d0000/i2c@fe5e0000/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe2c0000/mmc@fe000000cpus cpu@0cpu,arm,cortex-a55 psci-:@LYf@x cpu@100cpu,arm,cortex-a55psci-:@LYf@x cpu@200cpu,arm,cortex-a55psci-:@LYf@x cpu@300cpu,arm,cortex-a55psci-:@LYf@x l3-cache,cache/<@Ndisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc݂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s+Eokaysimple-audio-card,codecLsimple-audio-card,cpuL pmu,arm,cortex-a55-pmu0Va psci ,arm,psci-1.0&smcreserved-memory tshmem@10f000,arm,scmi-shmem{timer,arm,armv8-timer0V   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@ satapmaliverxoob V_ sata-phy Edisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob V` sata-phy Edisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ V ref_clksuspend_clkbus_clk peripheral utmi_wide 'Eokay usb2-phy@ Ghigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ V ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide 'Eokayinterrupt-controller@fd400000 ,arm,gic-v3 @F V Uj{A(t msi-controller@fd440000,arm,gic-v3-itsDcusb@fd800000 ,generic-ehci V usb Edisabledusb@fd840000 ,generic-ohci V usb Edisabledusb@fd880000 ,generic-ehci V usbEokayusb@fd8c0000 ,generic-ohci V usbEokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdaio-domains&,rockchip,rk3568-pmu-io-voltage-domainEokaysyscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru*clock-controller@fdd20000,rockchip,rk3568-cru xin24m* 7GG \si2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c V. - i2cpclk default Eokaypmic@20,rockchip,rk817 !Vrk808-clkout1rk808-clkout2mclk H7H\default"#$$$$$$$$%regulatorsDCDC_REG1 1 Ipaqv vdd_logicregulator-state-mem DCDC_REG2 1 Ipaqvvdd_gpuEregulator-state-memDCDC_REG3 vvcc_ddrregulator-state-memDCDC_REG4 12ZI2Zvvcc_3v3regulator-state-mem2ZLDO_REG1 1w@Iw@ vcca1v8_pmuMregulator-state-memw@LDO_REG2 1 I  vdda_0v9regulator-state-memLDO_REG3 1 I  vdda0v9_pmuregulator-state-mem LDO_REG4 12ZI2Z vccio_acodecregulator-state-memLDO_REG5 1w@I2Z vccio_sdregulator-state-memLDO_REG6 12ZI2Z vcc3v3_pmuregulator-state-mem2ZLDO_REG7 1w@Iw@vcc_1v8regulator-state-memLDO_REG8 1w@I2Z vcc1v8_dvpregulator-state-memLDO_REG9 1*I* vcc2v8_dvpregulator-state-memBOOST 1G`IReboost%regulator-state-memOTG_SWITCH otg_switchregulator-state-memcharger&'Dregulator@1c ,tcs,tcs4525k 1 4I5vdd_cpua$regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Vt  ,baudclkapb_pclk''(default Edisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)default Edisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default Edisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm   0 pwmpclk+default Edisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0  0 pwmpclk,default Edisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7 -power-domain@8  ./0power-domain@9   123power-domain@10  456789power-domain@11  :power-domain@13  ;power-domain@14  <=>power-domain@15 ?@ABCgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$V()' jobmmugpu gpubusEokayDEvideo-codec@fdea0400,rockchip,rk3568-vpu Vvdpu  aclkhclkF iommu@fdea0800,rockchip,rk3568-iommu@ V aclkiface  Frga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga VZ aclkhclksclk &$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu V@  aclkhclkG iommu@fdee0800,rockchip,rk3568-iommu@ V?  aclkiface Gmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Vd  biuciuciu-driveciu-sampleр resetEokay*4ERhHs IJKdefaultLMethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aV macirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref  stmmacethsNOP Edisabledmdio,snps,dwmac-mdio stmmac-axi-configNrx-queues-configOqueue0tx-queues-config*Pqueue0vop@fe040000 0@@vopgamma-lut V( %aclkhclkdclk_vp0dclk_vp1dclk_vp2Q sEokay,rockchip,rk3566-vop7\ports port@0 endpoint@2JR_port@1 endpoint@4JSUport@2 iommu@fe043e00,rockchip,rk3568-iommu >? V  aclkiface EokayQdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi VDpclk dphyT apb sEokay ports port@0endpointJUSport@1endpointJV[panel@0(,powkiddy,rk2023-panelnewvision,nv3051dZWdefaultX dYpZportendpointJ[Vdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi VEpclk dphy\ apb s Edisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  V-( (iahbisfrcecrefdefault] sEokay{^ports port@0endpointJ_Rport@1endpointJ`qos@fe128000,rockchip,rk3568-qossyscon -qos@fe138080,rockchip,rk3568-qossyscon <qos@fe138100,rockchip,rk3568-qossyscon =qos@fe138180,rockchip,rk3568-qossyscon >qos@fe148000,rockchip,rk3568-qossyscon .qos@fe148080,rockchip,rk3568-qossyscon /qos@fe148100,rockchip,rk3568-qossyscon 0qos@fe150000,rockchip,rk3568-qossyscon :qos@fe158000,rockchip,rk3568-qossyscon 4qos@fe158100,rockchip,rk3568-qossyscon 5qos@fe158180,rockchip,rk3568-qossyscon 6qos@fe158200,rockchip,rk3568-qossyscon 7qos@fe158280,rockchip,rk3568-qossyscon 8qos@fe158300,rockchip,rk3568-qossyscon 9qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon ?qos@fe190280,rockchip,rk3568-qossyscon @qos@fe190300,rockchip,rk3568-qossyscon Aqos@fe190380,rockchip,rk3568-qossyscon Bqos@fe190400,rockchip,rk3568-qossyscon Cqos@fe198000,rockchip,rk3568-qossyscon ;qos@fe1a8000,rockchip,rk3568-qossyscon 1qos@fe1a8080,rockchip,rk3568-qossyscon 2qos@fe1a8100,rockchip,rk3568-qossyscon 3dfi@fe230000,rockchip,rk3568-dfi# V apcie@fe260000,rockchip,rk3568-pcie0@&@dbiapbconfig<VKJIHGsyspmcmsglegacyerr( $aclk_mstaclk_slvaclk_dbipclkauxpcij`bbbbc  pcie-phyTt @@ pipe  Edisabledlegacy-interrupt-controllerjU VHbmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Vb  biuciuciu-driveciu-sampleр resetEokay*4 ! defgdefault #mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Vc  biuciuciu-driveciu-sampleр resetEokay*4 h  ijkldefault #spi@fe300000 ,rockchip,sfc0@ Ve xvclk_sfchclk_sfcmdefault Edisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 V7{}G n6( |zy{}corebusaxiblocktimer Edisabledrng@fe388000,rockchip,rk3568-rng8@ po coreahb m Edisabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ V47=AGFqFq ?C9mclk_txmclk_rxhclkn 1tx PQ tx-mrx-msEokay i2s@fe410000,rockchip,rk3568-i2s-tdmA V57EIGFqFq GK:mclk_txmclk_rxhclknn 1rxtx RS tx-mrx-msdefaultopqrEokay ;i2s@fe420000,rockchip,rk3568-i2s-tdmB V67MGFq OO;mclk_txmclk_rxhclknn 1txrx Ttx-msdefaultstuv Edisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC V7 SW<mclk_txmclk_rxhclknn 1txrx UV tx-mrx-ms Edisabledpdm@fe440000,rockchip,rk3568-pdmD VL ZYpdm_clkpdm_hclkn  1rxwxyz{|default Xpdm-m Edisabledspdif@fe460000,rockchip,rk3568-spdifF Vf mclkhclk _\n 1txdefault} Edisableddma-controller@fe530000,arm,pl330arm,primecellS@V  V   apb_pclk m'dma-controller@fe550000,arm,pl330arm,primecellU@V V   apb_pclk mni2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ V/ HG i2cpclk~default  Edisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ V0 JI i2cpclkdefault  Edisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ V1 LK i2cpclkdefault  Edisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] V2 NM i2cpclkdefault  Edisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ V3 PO i2cpclkdefault Eokay^watchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` V  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia Vg RQspiclkapb_pclk'' 1txrxdefault   Edisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib Vh TSspiclkapb_pclk'' 1txrxdefault   Edisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic Vi VUspiclkapb_pclk'' 1txrxdefault   Edisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid Vj XWspiclkapb_pclk'' 1txrxdefault   Edisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Vu baudclkapb_pclk'' defaultEokay xbluetooth*,realtek,rtl8821cs-btrealtek,rtl8723bs-bt Y Y Yserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Vv # baudclkapb_pclk''default Edisabledserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Vw '$baudclkapb_pclk''default Edisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Vx +(baudclkapb_pclk'' default Edisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Vy /,baudclkapb_pclk' ' default Edisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Vz 30baudclkapb_pclk' ' default Edisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk V{ 74baudclkapb_pclk''default Edisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl V| ;8baudclkapb_pclk''default Edisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm V} ?<baudclkapb_pclk''default Edisabledthermal-zonescpu-thermal d  tripscpu_alert0 p ?passivecpu_alert1 $ ?passivecpu_crit s  ?criticalcooling-mapsmap0 0  gpu-thermal   tripsgpu-threshold p ?passivegpu-target $ ?passivegpu-crit s  ?criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq Vs7Gf@ ` tsadcapb_pclk s sdefaultsleep - 7Eokay M dsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr V] saradcapb_pclk  saradc-apb Eokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultEokaypwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault Edisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  ZY pwmpclkdefaultEokaypwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 ZY pwmpclkdefaultEokaypwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault Edisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault Edisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ]\ pwmpclkdefault Edisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ]\ pwmpclkdefault Edisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault Edisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault Edisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  `_ pwmpclkdefault Edisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 `_ pwmpclkdefault Edisabledphy@fe830000,rockchip,rk3568-naneng-combphy "} refapbpipe7"G phy   Eokayphy@fe840000,rockchip,rk3568-naneng-combphy %~ refapbpipe7%G phy    Edisabledphy@fe870000,rockchip,rk3568-csi-dphy ypclk  apbs Edisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclk z  apb EokayTmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk {  apb  Edisabled\usb2phy@fe8a0000,rockchip,rk3568-usb2phy phyclkclk_usbphy0_480m V Eokayhost-port  Edisabledotg-port Eokayusb2phy@fe8b0000,rockchip,rk3568-usb2phy phyclkclk_usbphy1_480m V Eokayhost-port Eokayotg-port  Edisabledpinctrl,rockchip,rk3568-pinctrlsa tgpio@fdd60000,rockchip,gpio-bank V! .    Uj!gpio@fe740000,rockchip,gpio-bankt V" cd   Ujgpio@fe750000,rockchip,gpio-banku V# ef  @  Ujhgpio@fe760000,rockchip,gpio-bankv V$ gh  `  Ujgpio@fe770000,rockchip,gpio-bankw V% ij   UjYpcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  "pcfg-pull-none-drv-level-2  "pcfg-pull-none-drv-level-3  "pcfg-pull-up-drv-level-1  "pcfg-pull-up-drv-level-2  "pcfg-pull-none-smt  1pcfg-output-low Facodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 Qcpuebcedpdpemmceth0eth1flashfspifspi-pins` Qmgmac0gmac1gpuhdmitxhdmitxm0-cec Q]i2c0i2c0-xfer Q   i2c1i2c1-xfer Q  ~i2c2i2c2m0-xfer Q i2c3i2c3m0-xfer Qi2c4i2c4m0-xfer Q  i2c5i2c5m1-xfer Qi2s1i2s1m0-lrcktx Qpi2s1m0-mclk Q"i2s1m0-sclktx Qoi2s1m0-sdi0 Q qi2s1m0-sdo0 Qri2s2i2s2m0-lrcktx Qti2s2m0-sclktx Qsi2s2m0-sdi Qui2s2m0-sdo Qvi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk Qwpdmm0-clk1 Qxpdmm0-sdi0 Q ypdmm0-sdi1 Q zpdmm0-sdi2 Q {pdmm0-sdi3 Q|pmicpmic-int-l Q#pmupwm0pwm0m0-pins Q)pwm1pwm1m0-pins Q*pwm2pwm2m0-pins Q+pwm3pwm3-pins Q,pwm4pwm4-pins Qpwm5pwm5-pins Qpwm6pwm6-pins Qpwm7pwm7-pins Qpwm8pwm8m0-pins Q pwm9pwm9m0-pins Q pwm10pwm10m0-pins Q pwm11pwm11m0-pins Qpwm12pwm12m0-pins Qpwm13pwm13m0-pins Qpwm14pwm14m0-pins Qpwm15pwm15m0-pins Qrefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ Qdsdmmc0-clk Qesdmmc0-cmd Qfsdmmc0-det Qgsdmmc1sdmmc1-bus4@ Qisdmmc1-clk Qksdmmc1-cmd Qjsdmmc1-det Q lsdmmc2sdmmc2m0-bus4@ QIsdmmc2m0-clk QKsdmmc2m0-cmd QJspdifspdifm0-tx Q}spi0spi0m0-pins0 Q spi0m0-cs0 Qspi0m0-cs1 Qspi1spi1m0-pins0 Q spi1m0-cs0 Qspi1m0-cs1 Qspi2spi2m0-pins0 Qspi2m0-cs0 Qspi2m0-cs1 Qspi3spi3m0-pins0 Q  spi3m0-cs0 Qspi3m0-cs1 Qtsadctsadc-shutorg Qtsadc-pin Quart0uart0-xfer Q(uart1uart1m1-xfer Quart1m1-ctsn Quart1m1-rtsn Quart2uart2m0-xfer Quart3uart3m0-xfer Quart4uart4m0-xfer Quart5uart5m0-xfer Quart6uart6m0-xfer Quart7uart7m0-xfer Quart8uart8m0-xfer Quart9uart9m0-xfer Qvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2gpio-btnsbtn-pins-ctrl Q     btn-pins-vol Qjoy-muxjoy-mux-en Q gpio-lcdlcd-rst QXsdio-pwrseqwifi-enable-h Qvcc3v3-lcdvcc-lcd-h Qvcc-wifivcc-wifi-h Qopp-table-0,operating-points-v2 _opp-408000000 jQ q P P0 @opp-600000000 j#F q P P0 @opp-816000000 j0, q P P0 @ opp-1104000000 jAʹ q 0 @opp-1416000000 jTfr q0 @opp-1608000000 j_" q0 @opp-1800000000 jkI q000 @opp-table-1,operating-points-v2Dopp-200000000 j  q P PB@opp-300000000 j q P PB@opp-400000000 jׄ q P PB@opp-600000000 j#F q B@opp-700000000 j)' q~~B@opp-800000000 j/ qB@B@B@adc-joystick ,adc-joystick default < axis@0    axis@1    axis@2    axis@3    adc-mux,io-channel-mux left_xright_xleft_yright_y   parent  dbacklight,pwm-backlight $ aWbattery,simple-battery 0 > [ @ِ  ? 3@  ?d>p`_=Z<U<P;nK:F:A9gP<87827-7_(7!H#666+055 4u3@&gpio-keys-control ,gpio-keysdefaultbutton-a j 1EAST 1button-b j 1SOUTH 0button-down j 1DPAD-DOWN !button-l1 j  1TL 6button-l2 j  1TL2 8button-left j 1DPAD-LEFT "button-r1 j  1TR 7button-r2 j  1TR2 9button-right j 1DPAD-RIGHT #button-select j 1SELECT :button-start j  1START ;button-thumbl j 1THUMBL =button-thumbr j 1THUMBR >button-up j 1DPAD-UP  button-x j 1NORTH 3button-y j 1WEST 4gpio-keys-vol ,gpio-keys 7defaultbutton-vol-down j 1VOLUMEDOWN rbutton-vol-up j 1VOLUMEUP smux-controller ,gpio-mux B!! Lhdmi-con,hdmi-connector{^?cportendpointJ`pwm-leds ,pwm-ledsled-0 _ estatus n aled-1 _ echarging n asdio-pwrseq,mmc-pwrseq-simple  ext_clockdefault } dYHsound,simple-audio-card rk817_exti2s+ HeadphoneHeadphones HeadphonesHPOLHeadphonesHPORsimple-audio-card,codecLsimple-audio-card,cpuLregulator-vcc3v3-lcd0,regulator-fixed ! default12ZI2Zvcc3v3_lcd0_nZregulator-state-memregulator-vcc-sys,regulator-fixed 19I9vcc_sys$regulator-vcc-wifi,regulator-fixed  !default 12ZI2Z vcc_wifiL interrupt-parent#address-cells#size-cellscompatiblechassis-typemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc1mmc2mmc3device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grf#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-initial-moderegulator-nameregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendmonitored-batteryrockchip,resistor-sense-micro-ohmsrockchip,sleep-enter-current-microamprockchip,sleep-filter-current-microampfcs,suspend-voltage-selectorvin-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencybus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablevmmc-supplyvqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointbacklightreset-gpiosvdd-supplyddc-i2c-busrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanescd-gpiosdisable-wpsd-uhs-sdr104dma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enableoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendio-channelspoll-intervalabs-flatabs-fuzzabs-rangelinux,codeio-channel-namesmux-controlssettle-time-uspower-supplypwmscharge-full-design-microamp-hourscharge-term-current-microampconstant-charge-current-max-microampconstant-charge-voltage-max-microvoltfactory-internal-resistance-micro-ohmsvoltage-max-design-microvoltvoltage-min-design-microvoltocv-capacity-celsiusocv-capacity-table-0labelautorepeatmux-gpios#mux-control-cellscolorfunctionmax-brightnesspost-power-on-delay-mssimple-audio-card,widgetssimple-audio-card,routinggpioenable-active-high