8 ( radxa,rockpi-erockchip,rk3328 +7Radxa ROCK Pi Ealiases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000/ethernet@ff540000/ethernet@ff550000/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci@0=J@\iz cpu@1cpuarm,cortex-a53xpsci@0=J@\iz cpu@2cpuarm,cortex-a53xpsci@0=J@\iz cpu@3cpuarm,cortex-a53xpsci@0=J@\iz idle-statespscicpu-sleeparm,idle-statexl2-cachecache @2opp-table-0operating-points-v2opp-408000000Q ~.@?opp-600000000#F ~.@opp-8160000000, B@.@opp-1008000000< .@opp-1200000000G (.@opp-1296000000M?d  .@analog-soundsimple-audio-cardKi2sd~Analogokaysimple-audio-card,cpusimple-audio-card,codecarm-pmuarm,cortex-a53-pmu0defg display-subsystemrockchip,display-subsystem hdmi-soundsimple-audio-cardKi2sd~HDMI disabledsimple-audio-card,cpusimple-audio-card,codecpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0   xin24m fixed-clockn6xin24mFi2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s )7i2s_clki2s_hclk   txrx disabledi2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s *8i2s_clki2s_hclk txrxokayi2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s +9i2s_clki2s_hclk txrx disabledspdif@ff030000rockchip,rk3328-spdif .: mclkhclk  tx&default4 disabledpdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclk rx&defaultsleep4> disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfdDio-domains"rockchip,rk3328-io-voltage-domainokayHUcqgpiorockchip,rk3328-grf-gpiopower-controller!rockchip,rk3328-power-controller+;power-domain@1power-domain@6Dpower-domain@5 BABpower-domain@8Freboot-modesyscon-reboot-modeRBRBRB  RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart 7&baudclkapb_pclk txrx&default 4 # disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart 8'baudclkapb_pclk txrx&default 4!"## disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart 9(baudclkapb_pclk txrx&default4$#okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c $+7 i2cpclk&default4% disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c %+8 i2cpclk&default4&okaypmic@18rockchip,rk805 'xin32krk805-clkout2&default4(-ES)_)k)w))regulatorsDCDC_REG1vdd_log 4 0regulator-state-mem-B@DCDC_REG2vdd_arm 4 0regulator-state-mem-~DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vcc_io2Z2Zregulator-state-mem-2ZLDO_REG1vcc_18w@w@9regulator-state-mem-w@LDO_REG2 vcc18_emmcw@w@regulator-state-mem-w@LDO_REG3vdd_10B@B@regulator-state-mem-B@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c &+9 i2cpclk&default4* disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c '+: i2cpclk&default4+ disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi 1+ spiclkapb_pclk  txrx&default4,-./ disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt (pwm@ff1b0000rockchip,rk3328-pwm< pwmpclk&default40I disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclk&default41I disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclk&default42I disabledpwm@ff1b0030rockchip,rk3328-pwm0< pwmpclk&default43I disableddma-controller@ff1f0000arm,pl330arm,primecell@T apb_pclkkthermal-zonessoc-thermalv4tripstrip-point0ppassivetrip-point1Lpassive5soc-crits criticalcooling-mapsmap050 map15 6tsadc@ff250000rockchip,rk3328-tsadc% :$P$tsadcapb_pclk&initdefaultsleep47>87#B *tsadc-apb6Mokay4efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efusec id@7cpu-leakage@17logic-leakage@19cpu-version@1awGadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( P|%saradcapb_pclk#V *saradc-apbokay9ggpu@ff300000"rockchip,rk3328-maliarm,mali-4500TZW]XY[\"gpgpmmupppp0ppmmu0pp1ppmmu1 buscore:;#f6opp-table-gpuoperating-points-v2:opp-200000000  g8opp-300000000 g8opp-400000000ׄ g8opp-500000000e 0 disablediommu@ff330200rockchip,iommu3 ` aclkiface disablediommu@ff340800rockchip,iommu4@ bF aclkiface disabledvideo-codec@ff350000rockchip,rk3328-vpu5  vdpuF aclkhclk<;iommu@ff350800rockchip,iommu5@  F aclkiface;<video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6  BABaxiahbcabaccoreAB ׄׄ=;iommu@ff360480rockchip,iommu 6@6@ JB aclkiface;=vop@ff370000rockchip,rk3328-vop7>  x;aclk_vopdclk_vophclk_vop# *axiahbdclk> disabledport endpoint?Eiommu@ff373f00rockchip,iommu7?  ; aclkiface disabled>hdmi@ff3c0000rockchip,rk3328-dw-hdmi< #Fiahbisfrcec@hdmi&default 4ABCD disabledports+port@0endpointE?port@1codec@ff410000rockchip,rk3328-codecA* pclkmclkDokayphy@ff430000rockchip,rk3328-hdmi-phyC SFysysclkrefoclkrefpclk hdmi_phyG cpu-version disabled@clock-controller@ff440000rockchip,rk3328-cruDFxin24mD x=&'(ABDC"\5H4$-zFFF|n6n6n6ׄn6#FLGрxhxhрxhxhsyscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyFphyclk usb480m_phy{-HokayHotg-port$;<=otg-bvalidotg-idlinestateokayZhost-port > linestateokay[mmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@   =!JNbiuciuciu-driveciu-sampleDOр#m*resetokay]gx&default4IJKLMmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@   >"KObiuciuciu-driveciu-sampleDOр#n*reset disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@  ?#LPbiuciuciu-driveciu-sampleDOр#o*resetokay]&default 4NOPethernet@ff540000rockchip,rk3328-gmacT macirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac#c *stmmacethDokaydf-QQinput Rrgmii &default4S+&4mdiosnps,dwmac-mdio+ethernet-phy@14TU&default V='MP _VRethernet@ff550000rockchip,rk3328-gmacUD macirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphy#b *stmmacethrmii Woutputokaymdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22V#d&default4XYkWusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X Motg}otg@ Z usb2-phyokayusb@ff5c0000 generic-ehci\  NH[usbokayusb@ff5d0000 generic-ohci]  NH[usb disabledmmc@ff5f00000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc_@  @MQbiuciuciu-driveciu-sampleDOр#h*reset disabledusb@ff600000rockchip,rk3328-dwc3snps,dwc3` C`aref_clksuspend_clkbus_clk}host utmi_wide  : Sokayinterrupt-controller@ff811000 arm,gic-400 l }@ @ `   crypto@ff060000rockchip,rk3328-crypto@ PQ;hclk_masterhclk_slavesclk#D *crypto-rstpinctrlrockchip,rk3328-pinctrlD+ gpio@ff210000rockchip,gpio-bank! 3 } l1 pin-15 [GPIO0_D3]'gpio@ff220000rockchip,gpio-bank" 4 } l1 pin-07 [GPIO1_D4]Vgpio@ff230000rockchip,gpio-bank# 5 } lA pin-08 [GPIO2_A0]pin-10 [GPIO2_A1]pin-11 [GPIO2_A2]pin-13 [GPIO2-A3]pin-27 [GPIO2_A4]pin-28 [GPIO2_A5]pin-33 [GPIO2_A6]pin-26 [GPIO2_B4]pin-36 [GPIO2_B7]pin-32 [GPIO2_C0]pin-35 [GPIO2_C1]pin-12 [GPIO2_C2]pin-38 [GPIO2_C3]pin-29 [GPIO2_C4]pin-31 [GPIO2_C5]pin-37 [GPIO2_C6]pin-40 [GPIO2_C7]gpio@ff240000rockchip,gpio-bank$ 6 } l pin-23 [GPIO3_A0]pin-19 [GPIO3_A1]pin-21 [GPIO3_A2]pin-03 [GPIO3_A4]pin-05 [GPIO3_A6]pin-24 [GPIO3_B0]ipcfg-pull-up ^pcfg-pull-down fpcfg-pull-none \pcfg-pull-none-2ma  epcfg-pull-up-2ma  pcfg-pull-up-4ma  _pcfg-pull-none-4ma  bpcfg-pull-down-4ma  pcfg-pull-none-8ma  `pcfg-pull-up-8ma  apcfg-pull-none-12ma  cpcfg-pull-up-12ma  dpcfg-output-high pcfg-output-low pcfg-input-high  ]pcfg-input i2c0i2c0-xfer \\%i2c1i2c1-xfer \\&i2c2i2c2-xfer  \\*i2c3i2c3-xfer \\+i2c3-pins \\hdmi_i2chdmii2c-xfer \\Bpdm-0pdmm0-clk \pdmm0-fsync \pdmm0-sdi0 \pdmm0-sdi1 \pdmm0-sdi2 \pdmm0-sdi3 \pdmm0-clk-sleep ]pdmm0-sdi0-sleep ]pdmm0-sdi1-sleep ]pdmm0-sdi2-sleep ]pdmm0-sdi3-sleep ]pdmm0-fsync-sleep ]tsadcotp-pin  \7otp-out  \8uart0uart0-xfer  \^uart0-cts  \uart0-rts  \ uart0-rts-pin  \uart1uart1-xfer \^!uart1-cts \"uart1-rts \#uart1-rts-pin \uart2-0uart2m0-xfer \^uart2-1uart2m1-xfer \^$spi0-0spi0m0-clk ^spi0m0-cs0  ^spi0m0-tx  ^spi0m0-rx  ^spi0m0-cs1  ^spi0-1spi0m1-clk ^spi0m1-cs0 ^spi0m1-tx ^spi0m1-rx ^spi0m1-cs1 ^spi0-2spi0m2-clk ^,spi0m2-cs0 ^/spi0m2-tx ^-spi0m2-rx ^.i2s1i2s1-mclk \i2s1-sclk \i2s1-lrckrx \i2s1-lrcktx \i2s1-sdi \i2s1-sdo \i2s1-sdio1 \i2s1-sdio2 \i2s1-sdio3 \i2s1-sleep ]]]]]]]]]i2s2-0i2s2m0-mclk \i2s2m0-sclk \i2s2m0-lrckrx \i2s2m0-lrcktx \i2s2m0-sdi \i2s2m0-sdo \i2s2m0-sleep` ]]]]]]i2s2-1i2s2m1-mclk \i2s2m1-sclk \i2sm1-lrckrx \i2s2m1-lrcktx \i2s2m1-sdi \i2s2m1-sdo \i2s2m1-sleepP ]]]]]spdif-0spdifm0-tx \spdif-1spdifm1-tx \spdif-2spdifm2-tx \sdmmc0-0sdmmc0m0-pwren _sdmmc0m0-pin _sdmmc0-1sdmmc0m1-pwren _sdmmc0m1-pin _jsdmmc0sdmmc0-clk `Isdmmc0-cmd aJsdmmc0-dectn _Ksdmmc0-wrprt _sdmmc0-bus1 asdmmc0-bus4@ aaaaLsdmmc0-pins ________sdmmc0extsdmmc0ext-clk bsdmmc0ext-cmd _sdmmc0ext-wrprt _sdmmc0ext-dectn _sdmmc0ext-bus1 _sdmmc0ext-bus4@ ____sdmmc0ext-pins ________sdmmc1sdmmc1-clk  `sdmmc1-cmd  asdmmc1-pwren asdmmc1-wrprt asdmmc1-dectn asdmmc1-bus1 asdmmc1-bus4@ aaaasdmmc1-pins  _ ________emmcemmc-clk cNemmc-cmd dOemmc-pwren \emmc-rstnout \emmc-bus1 demmc-bus4@ ddddemmc-bus8 ddddddddPpwm0pwm0-pin \0pwm1pwm1-pin \1pwm2pwm2-pin \2pwmirpwmir-pin \3gmac-1rgmiim1-pins`  ` bb`bbb b b` `bb``` `b````Srmiim1-pins eceeee e ec c \ \\\\\gmac2phyfephyled-speed10 \fephyled-duplex \fephyled-rxm1 \Xfephyled-txm1 \fephyled-linkm1 \Ytsadc_pintsadc-int  \tsadc-pin  \hdmi_pinhdmi-cec \Ahdmi-hpd fCcif-0dvp-d2d9-m0 \\\\\ \ \ \\\\\cif-1dvp-d2d9-m1 \\\\\\\\\\\\ephyeth-phy-int-pin fTeth-phy-reset-pin fUledsled-pin \hpmicpmic-int-l ^(usb3usb30-host-drv \kwifiwifi-en \lchosen serial2:1500000n8adc-keys adc-keys g +buttons <button-recovery VRecovery \h g'external-gmac-clock fixed-clocksY@ gmac_clkinQleds gpio-leds4h&defaultled-0  ei heartbeatregulator-sdmmcregulator-fixed '&default4jvcc_sd Mregulator-vcc-host-5vregulator-fixed i&default4k  vcc_host_5v )regulator-vcc-sysregulator-fixedvcc_sysLK@LK@)regulator-vcc-wifiregulator-fixed '&default4l vcc_wifi  compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pmuio-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftsystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,efuse-sizebits#io-channel-cellsvref-supplyinterrupt-namespower-domains#iommu-cellsiommusremote-endpointphysphy-namesrockchip,grfnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpvmmc-supplycap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vnon-removablevqmmc-supplytx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-handlephy-modephy-supplytx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltcolorlinux,default-triggergpiovin-supplyenable-active-high