8x( M@$mediatek,mt8188-evbmediatek,mt8188 +!7MediaTek MT8188 evaluation boardaliases=/soc/dp-intf@1c015000F/soc/dp-intf@1c113000O/soc/dsc@1c009000T/soc/ethdr@1c114000[/soc/mailbox@10320000`/soc/mailbox@10330000e/soc/merge0@1c014000l/soc/merge@1c10c000s/soc/merge@1c10d000z/soc/merge@1c10e000/soc/merge@1c10f000/soc/merge@1c110000/soc/mutex@1c016000/soc/mutex@1c101000/soc/padding@1c11d000/soc/padding@1c11e000/soc/padding@1c11f000/soc/padding@1c120000/soc/padding@1c121000/soc/padding@1c122000/soc/padding@1c123000/soc/padding@1c124000/soc/rdma@1c104000/soc/rdma@1c105000/soc/rdma@1c106000/soc/rdma@1c107000/soc/rdma@1c108000/soc/rdma@1c109000'/soc/rdma@1c10a0002/soc/rdma@1c10b000=/soc/serial@11001100E/soc/i2c@11280000J/soc/i2c@11e00000O/soc/i2c@11281000T/soc/i2c@11282000Y/soc/i2c@11e01000^/soc/i2c@11ec0000c/soc/i2c@11ec1000h/soc/mmc@11230000cpus+cpu@0mcpuarm,cortex-a55y}psciw5@@ ';J cpu@100mcpuarm,cortex-a55y}psciw5@@ ';J cpu@200mcpuarm,cortex-a55y}psciw5@@ ';J cpu@300mcpuarm,cortex-a55y}psciw5@@ ';J cpu@400mcpuarm,cortex-a55y}psciw5@@ ';J cpu@500mcpuarm,cortex-a55y}psciw5@@ ';Jcpu@600mcpuarm,cortex-a78y}psci@@ ';Jcpu@700mcpuarm,cortex-a78y}psci@@ ';Jcpu-mapcluster0core0R core1R core2R core3R core4R core5Rcore6Rcore7Ridle-statesVpscicpu-off-larm,idle-statecz2_DJcpu-off-barm,idle-statecz-Jcluster-off-larm,idle-statecz7HJcluster-off-barm,idle-statecz2Jl2-cache0cache@Jl2-cache1cache@Jl3-cachecache @Joscillator-13m fixed-clock]@clk13mJ3oscillator-26m fixed-clockclk26mJ5oscillator-32k fixed-clockclk32kopp-table-gpuoperating-points-v2J[opp-390000000> opp-431000000 opp-4730000001h@ 'opp-515000000F Xopp-556000000!# hopp-598000000# <opp-640000000&% opp-670000000'c opp-700000000)' Lopp-730000000+ }opp-760000000-L `opp-790000000/q 4opp-8350000001 (ropp-8800000004s qopp-9150000006 Xopp-915000000-56 0opp-915000000-66 qpopp-9500000008ـ 5opp-950000000-58ـ X0opp-950000000-68ـ qppmu-a55arm,cortex-a55-pmu (pmu-a78arm,cortex-a78-pmu (psci arm,psci-1.0smcsound3 Edisabledthermal-zonescpu-little0-thermalLZptripstrip-alert0LtpassiveJtrip-alert1sthottrip-crit tcriticalcooling-mapsmap0H cpu-little1-thermalLZptripstrip-alert0LtpassiveJtrip-alert1sthottrip-crit tcriticalcooling-mapsmap0H cpu-little2-thermalLZptripstrip-alert0LtpassiveJtrip-alert1sthottrip-crit tcriticalcooling-mapsmap0H cpu-little3-thermalLZptripstrip-alert0LtpassiveJtrip-alert1sthottrip-crit tcriticalcooling-mapsmap0H cpu-big0-thermalLZdptripstrip-alert0LtpassiveJtrip-alert1sthottrip-crit tcriticalcooling-mapsmap0cpu-big1-thermalLZdptripstrip-alert0LtpassiveJtrip-alert1sthottrip-crit tcriticalcooling-mapsmap0apu-thermalLZptripstrip-alert0Ltpassivetrip-alert1sthottrip-crit tcriticalgpu-thermalLZptripstrip-alert0LtpassiveJtrip-alert1sthottrip-crit tcriticalcooling-mapsmap0 gpu1-thermalLZptripstrip-alert0LtpassiveJtrip-alert1sthottrip-crit tcriticalcooling-mapsmap0 adsp-thermalLZptripstrip-alert0Ltpassivetrip-alert1sthottrip-crit tcriticalvdo-thermalLZptripstrip-alert0Ltpassivetrip-alert1sthottrip-crit tcriticalinfra-thermalLZptripstrip-alert0Ltpassivetrip-alert1sthottrip-crit tcriticalcam1-thermalLZptripstrip-alert0Ltpassivetrip-alert1sthottrip-crit tcriticalcam2-thermalLZptripstrip-alert0Ltpassivetrip-alert1sthottrip-crit tcriticaltimerarm,armv8-timer @(   ]@soc+ simple-busperformance-controller@11bc10mediatek,cpufreq-hw y 0 Jinterrupt-controller@c000000 arm,gic-v3  y   ( Jppi-partitionsinterrupt-partition-0 Jinterrupt-partition-1 Jsyscon@10000000 mediatek,mt8188-topckgensysconyJ"syscon@10001000#mediatek,mt8188-infracfg-aosysconyJ#syscon@10003000mediatek,mt8188-pericfgsyscony0JApinctrl@10005000mediatek,mt8188-pinctrl`yP0#iocfg0iocfg_rmiocfg_ltiocfg_lmiocfg_rteint-=I (J adsp-uart-pinspins-tx-rxU#$i2c0-pinsJJpins-busU87\i2c1-pinsJTpins-busU:9\i2c2-pinsJKpins-busU<;\i2c3-pinsJLpins-busU>=\i2c4-pinsJUpins-busU@?\i2c5-pinsJWpins-busUBA\i2c6-pinsJXpins-busUDC\mmc0-default-pinsJGpins-cmd-dat$Uiv\epins-clkUvfpins-rstUv\emmc0-uhs-pinsJHpins-cmd-dat$Uiv\epins-clk-dsUvfpins-rstUv\enor-pinsJRpins-io-ck U}pins-io-cs U~\spi0-pinsJ;pins-spiUEFGHspi1-pinsJ=pins-spiUKLMNspi2-pinsJ>pins-spiUOPQRuart0-pinsJ:pins-rx-txU \syscon@10006000)mediatek,mt8188-scpsyssysconsimple-mfdy`power-controller!mediatek,mt8188-power-controller+J6power-domain@0y+power-domain@1y!"mfgalt#+power-domain@2ypower-domain@3ypower-domain@4ypower-domain@15y"""" "3"4"=""$ $ $$$$$$$$$$$$$$$$$ topcamccuimgvencvdecwpecfgckcfgxoss-sram-cmnss-sram-v0l0ss-sram-v0l1ss-sram-ve0ss-sram-ve1ss-sram-ifass-sram-camss-sram-v1l5ss-sram-v1l6ss-sram-rdrss-iommuss-imgcamss-emiss-subcmn-rdrss-rsiss-cmn-l4ss-vdec1ss-wpess-cvdo-ve1#+power-domain@16yH""%%%%%%%Acfgckcfgxoss-galsss-cmnss-emiss-iommuss-larbss-rsiss-bus#+power-domain@20y0""&&&&8cfgckcfgxoss-vpp1-g5ss-vpp1-g6ss-vpp1-l5ss-vpp1-l6#power-domain@22y'ss-vdec1-soc-l1#+power-domain@23y( ss-vdec2-l1#power-domain@29y """ "camccubuscfgck#+power-domain@30y()))))6ss-cam-l13ss-cam-l14ss-cam-mm0ss-cam-mm1ss-camsys#+power-domain@32y )*+$ss-camb-subss-camb-rawss-camb-yuvpower-domain@31y),-$ss-cama-subss-cama-rawss-cama-yuvpower-domain@17y(""...&cfgckcfgxoss-larb2ss-larb3ss-gals#+power-domain@9y "@"? bushdcp#power-domain@18y#power-domain@19y#power-domain@24y ////0ss-ve1-larbss-ve1-coress-ve1-galsss-ve1-sram#power-domain@21y00ss-wpe-l7ss-wpe-l7pce#power-domain@5y#1 ss-pextp-fmempower-domain@7y"0"1seninf0seninf1power-domain@6ypower-domain@10y "E"D busmain#+power-domain@11y #+power-domain@14y"Fasm#power-domain@13y "S"2a1sysintbusadspck#power-domain@12y #power-domain@8y1  ethermac#watchdog@10007000mediatek,mt8188-wdtypJ7syscon@1000c000"mediatek,mt8188-apmixedsyssysconyJ!timer@10017000,mediatek,mt8188-timermediatek,mt6765-timeryp( 3pwrap@100240003mediatek,mt8188-pwrapmediatek,mt8195-pwrapsyscony@#pwrap(## spiwrappmicmediatek,mt6359  adcmediatek,mt6359-auxadcaudio-codecmediatek,mt6359-codecregulatorsmediatek,mt6359-regulatorbuck_vs1)vs18 5P!hbuck_vgpu11)vgpu118P7h buck_vmodem)vmodem8P*hbuck_vpu)vpu8P7h buck_vcore)vcore8P h buck_vs2)vs28 5Pjhbuck_vpa)vpa8 P7h,buck_vproc2)vproc28P7Lh buck_vproc1)vproc18P7Lh buck_vcore_sshub )vcore_sshub8P7buck_vgpu11_sshub )vgpu11_sshub8P7ldo_vaud18)vaud188w@Pw@hldo_vsim1)vsim18P/M`ldo_vibr)vibr8OP2Zldo_vrf12)vrf128P ldo_vusb)vusb8-P-hldo_vsram_proc2 )vsram_proc28 PLhldo_vio18)vio188Phldo_vcamio)vcamio8Pldo_vcn18)vcn188w@Pw@hldo_vfe28)vfe288*P*hxldo_vcn13)vcn138 P ldo_vcn33_1_bt )vcn33_1_bt8*P5gldo_vcn33_1_wifi )vcn33_1_wifi8*P5gldo_vaux18)vaux188w@Pw@hldo_vsram_others )vsram_others8 Phldo_vefuse)vefuse8Pldo_vxo22)vxo228w@P!ldo_vrfck)vrfck8`Pldo_vrfck_1)vrfck8Pjldo_vbif28)vbif288*P*hldo_vio28)vio288*P2Zldo_vemc)vemc8,@ P2Zldo_vemc_1)vemc8&%P2ZJEldo_vcn33_2_bt )vcn33_2_bt8*P5gldo_vcn33_2_wifi )vcn33_2_wifi8*P5gldo_va12)va128OP ldo_va09)va098 5POldo_vrf18)vrf188PPldo_vsram_md )vsram_md8 P*hldo_vufs)vufs8PJFldo_vm18)vm188Pldo_vbbck)vbbck8POldo_vsram_proc1 )vsram_proc18 PLhldo_vsim2)vsim28P/M`ldo_vsram_others_sshub)vsram_others_sshub8 Prtcmediatek,mt6358-rtcspmi@10027000*mediatek,mt8188-spmimediatek,mt8195-spmi yp #pmifspmimst"8"##"8(pmif_sys_ckpmif_tmr_ckspmimst_clk_muxiommu@10315000mediatek,mt8188-iommu-infray1P(JPmailbox@10320000mediatek,mt8188-gcey2@(#J\mailbox@10330000mediatek,mt8188-gcey3@(#J^scp@10720000mediatek,mt8188-scp-dualyr#cfg+PEokayscp@0mediatek,scp-corey #sram(Eokay4J_scp@d0000mediatek,scp-corey #sram( Edisabledaudio-controller@10b10000mediatek,mt8188-afey"S"5! ! """"""S"" "E"Q"M"N"O"P2""""T"Rclk26mapll1apll2apll12_div0apll12_div1apll12_div2apll12_div3apll12_div9top_a1sys_hptop_aud_intbustop_audio_htop_audio_local_bustop_dptxtop_i2so1top_i2so2top_i2si1top_i2si2adsp_audio_26mapll1_d4apll2_d4apll12_div4top_a2systop_aud_iec(66 !7 (audiosys#4" EdisabledJadsp@10b80000mediatek,mt8188-dsp@y #cfgsramsecbus"D"D"Eaudiodspadsp_busF89Mrxtx6  Edisabledmailbox@10b861004mediatek,mt8188-adsp-mboxmediatek,mt8186-adsp-mboxya(J8mailbox@10b871004mediatek,mt8188-adsp-mboxmediatek,mt8186-adsp-mboxyq(J9clock-controller@10b91100mediatek,mt8188-adsp-audio26myJ2serial@11001100*mediatek,mt8188-uartmediatek,mt6577-uarty( 5# baudbusEokayXdefaultf:serial@11001200*mediatek,mt8188-uartmediatek,mt6577-uarty( 5# baudbus Edisabledserial@11001300*mediatek,mt8188-uartmediatek,mt6577-uarty( 5# baudbus Edisabledserial@11001400*mediatek,mt8188-uartmediatek,mt6577-uarty( 5# baudbus Edisabledadc@11002000.mediatek,mt8188-auxadcmediatek,mt8173-auxadcy #mainEokaysyscon@11003000"mediatek,mt8188-pericfg-aosyscony0J1spi@1100a000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+y("y"#parent-clksel-clkspi-clkEokayXdefaultf;thermal-sensor@1100b000mediatek,mt8188-lvts-apy (#!#p<|lvts-calib-data-1Jpwm@1100e0002mediatek,mt8188-disp-pwmmediatek,mt8183-disp-pwmy"'#/mainmm( Edisabledpwm@1100f0002mediatek,mt8188-disp-pwmmediatek,mt8183-disp-pwmy"(#Fmainmm( Edisabledspi@11010000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+y("y"#2parent-clksel-clkspi-clkEokayXdefaultf=spi@11012000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+y ("y"#3parent-clksel-clkspi-clkEokayXdefaultf>spi@11013000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+y0("y"#4parent-clksel-clkspi-clk Edisabledspi@11018000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+y("y"#8parent-clksel-clkspi-clk Edisabledspi@11019000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+y("y"#9parent-clksel-clkspi-clk Edisabledusb@11201000#mediatek,mt8188-mtu3mediatek,mtu3 y - > #macippc ?+(")"v1 "1 sys_ckref_ckmcu_ck?@ Ah Edisabledusb@0'mediatek,mt8188-xhcimediatek,mtk-xhciy#mac("*"v1 sys_ckEokayethernet@11021000;mediatek,mt8188-gmacmediatek,mt8195-gmacsnps,dwmac-5.10ay@(macirq011"A"B"C1 .axiapbmac_mainptp_refrmii_internalmac_cg"A"B"C"""6#B CD/:E Edisabledmdiosnps,dwmac-mdio+stmmac-axi-configR\lJBrx-queues-config|JCqueue0queue1queue2queue3tx-queues-configJDqueue0queue1queue2queue3mmc@11230000(mediatek,mt8188-mmcmediatek,mt8183-mmc y#( "###M!sourcehclksource_cgcrypto_clkEokayH) 7IXgtEFXdefaultstate_uhsfGHmmc@11240000(mediatek,mt8188-mmcmediatek,mt8183-mmc y$("##$sourcehclksource_cg"" Edisabledmmc@11250000(mediatek,mt8188-mmcmediatek,mt8183-mmc y%("##Asourcehclksource_cg"" Edisabledthermal-sensor@11278000mediatek,mt8188-lvts-mcuy'(#!#p<|lvts-calib-data-1Ji2c@11280000mediatek,mt8188-i2c y("(I#7 maindma+EokayXdefaultfJi2c@11281000mediatek,mt8188-i2c y("(I#7 maindma+EokayXdefaultfKi2c@11282000mediatek,mt8188-i2c y( "(I#7 maindma+EokayXdefaultfLclock-controller@11283000mediatek,mt8188-imp-iic-wrap-cy(0JIusb@112a1000#mediatek,mt8188-mtu3mediatek,mtu3 y*-*> #macippc*?+("-"v1"1sys_ckref_ckmcu_ckM Ap Edisabledusb@0'mediatek,mt8188-xhcimediatek,mtk-xhciy#mac("."v1sys_ckEokayusb@112b1000#mediatek,mt8188-mtu3mediatek,mtu3 y+-+> #macippc+?+(","v1"1sys_ckref_ckmcu_ckN A` Edisabledusb@0'mediatek,mt8188-xhcimediatek,mtk-xhciy#mac("+"v1sys_ckEokaypcie@112f0000*mediatek,mt8188-pciemediatek,mt8192-pciey/  #pcie-mac mpci+0#L###&#+#C1 /pl_250mtl_26mtl_96mtl_32kperi_26mperi_mem(`OOOO P Q #pcie-phy6!7(mac Edisabledinterrupt-controllerJOspi@1132c000(mediatek,mt8188-normediatek,mt8186-nory2"X11 spisfaxi"X(9+EokayXdefaultfRflash@0jedec,spi-nory -ut-phy@11c20700.mediatek,mt8188-tphymediatek,generic-tphy-v3+6 Edisabledpcie-phy@0y"ref ?JQdsi-phy@11c800000mediatek,mt8188-mipi-txmediatek,mt8183-mipi-txy5 mipi_tx0_pll ? EdisabledJsdsi-phy@11c900000mediatek,mt8188-mipi-txmediatek,mt8183-mipi-txy5 mipi_tx0_pll ? EdisabledJti2c@11e00000mediatek,mt8188-i2c y"(S#7 maindma+EokayXdefaultfTi2c@11e01000mediatek,mt8188-i2c y"(S#7 maindma+EokayXdefaultfUclock-controller@11e02000mediatek,mt8188-imp-iic-wrap-wy JSt-phy@11e30000.mediatek,mt8188-tphymediatek,generic-tphy-v3+Eokayusb-phy@0y"! refda_ref ?JNt-phy@11e40000.mediatek,mt8188-tphymediatek,generic-tphy-v3+Eokayusb-phy@0y"! refda_ref ?J?usb-phy@700y !5 refda_ref ?J@t-phy@11e80000.mediatek,mt8188-tphymediatek,generic-tphy-v3+Eokayusb-phy@0y"! refda_ref ?JMi2c@11ec0000mediatek,mt8188-i2c y"(V#7 maindma+EokayXdefaultfWi2c@11ec1000mediatek,mt8188-i2c y"(V#7 maindma+EokayXdefaultfXclock-controller@11ec2000 mediatek,mt8188-imp-iic-wrap-eny JVefuse@11f20000,mediatek,mt8188-efusemediatek,mt8186-efusey+dp-calib@1a0y Jzlvts1-calib@1acy@J<gpu-speedbin@581y JJZsocinfo-data1@7a0ysocinfo-data2@7e0ygpu@13000000)mediatek,mt8188-maliarm,mali-valhall-jmy@Y0(~} jobmmugpupZ |speed-bin O[666 ccore0core1core2; EdisabledJclock-controller@13fbf000mediatek,mt8188-mfgcfgyJYsyscon@14000000mediatek,mt8188-vppsys0sysconyJ$dma-controller@14001000mediatek,mt8188-mdp3-rdmay v$<F\ \\\\ ]6 ^   _display@140020000mediatek,mt8188-mdp3-fgmediatek,mt8195-mdp3-fgy $ ^ display@140040002mediatek,mt8188-mdp3-hdrmediatek,mt8195-mdp3-hdry@$" ^@display@140050002mediatek,mt8188-mdp3-aalmediatek,mt8195-mdp3-aalyP(F$ 6 ^Pdisplay@140060002mediatek,mt8188-mdp3-rszmediatek,mt8183-mdp3-rszy`$  ^` %display@140070006mediatek,mt8188-mdp3-tdshpmediatek,mt8195-mdp3-tdshpyp$# ^pdisplay@140080006mediatek,mt8188-mdp3-colormediatek,mt8195-mdp3-colory(I$$6 ^display@140090002mediatek,mt8188-mdp3-ovlmediatek,mt8195-mdp3-ovly(J$%6 ^ ]display@1400a000:mediatek,mt8188-mdp3-paddingmediatek,mt8195-mdp3-paddingy$6 ^display@1400b0002mediatek,mt8188-mdp3-tccmediatek,mt8195-mdp3-tccy$ ^display@1400c0004mediatek,mt8188-mdp3-wrotmediatek,mt8183-mdp3-wroty v$ ]6 ^  +mutex@1400f000mediatek,mt8188-vpp-mutexy(P$6 ^smi@14012000mediatek,mt8188-smi-common-vppy $$apbsmi6J`smi@14013000mediatek,mt8188-smi-larby0$$apbsmi6  `Jciommu@14018000mediatek,mt8188-iommu-vppyP$bclk(R6 abcdefJ]dma-controller@14f09000mediatek,mt8188-mdp3-rdmay v&  g6 ^  dma-controller@14f0a000mediatek,mt8188-mdp3-rdmay v&  ]6 ^  display@14f0c0000mediatek,mt8188-mdp3-fgmediatek,mt8195-mdp3-fgy&  ^ display@14f0d0000mediatek,mt8188-mdp3-fgmediatek,mt8195-mdp3-fgy&  ^ display@14f0f0002mediatek,mt8188-mdp3-hdrmediatek,mt8195-mdp3-hdry&" ^ display@14f100002mediatek,mt8188-mdp3-hdrmediatek,mt8195-mdp3-hdry&$ ^ display@14f120002mediatek,mt8188-mdp3-aalmediatek,mt8195-mdp3-aaly (j&#6 ^ display@14f130002mediatek,mt8188-mdp3-aalmediatek,mt8195-mdp3-aaly0(k&%6 ^ 0display@14f150002mediatek,mt8188-mdp3-rszmediatek,mt8183-mdp3-rszyP& ^ P display@14f160002mediatek,mt8188-mdp3-rszmediatek,mt8183-mdp3-rszy`& ^ ` display@14f180006mediatek,mt8188-mdp3-tdshpmediatek,mt8195-mdp3-tdshpy& ^ display@14f190006mediatek,mt8188-mdp3-tdshpmediatek,mt8195-mdp3-tdshpy& ^ display@14f1a0006mediatek,mt8188-mdp3-mergemediatek,mt8195-mdp3-mergey&6 ^ display@14f1b0006mediatek,mt8188-mdp3-mergemediatek,mt8195-mdp3-mergey&6 ^ display@14f1d0006mediatek,mt8188-mdp3-colormediatek,mt8195-mdp3-colory(u&6 ^ display@14f1e0006mediatek,mt8188-mdp3-colormediatek,mt8195-mdp3-colory(v&6 ^ display@14f21000:mediatek,mt8188-mdp3-paddingmediatek,mt8195-mdp3-paddingy&6 ^ display@14f22000:mediatek,mt8188-mdp3-paddingmediatek,mt8195-mdp3-paddingy &6 ^ display@14f240004mediatek,mt8188-mdp3-wrotmediatek,mt8183-mdp3-wroty@ v& g6 ^ @ display@14f250004mediatek,mt8188-mdp3-wrotmediatek,mt8183-mdp3-wrotyP v& ]6 ^ P clock-controller@14e00000mediatek,mt8188-wpesysyJ0clock-controller@14e02000mediatek,mt8188-wpesys-vpp0y smi@14e04000mediatek,mt8188-smi-larby@00apbsmi6  `Jesyscon@14f00000mediatek,mt8188-vppsys1sysconyJ&mutex@14f01000mediatek,mt8188-vpp-mutexy({&&6 ^ smi@14f02000mediatek,mt8188-smi-larby &&apbsmi6  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\rdma@1c10b0004mediatek,mt8188-vdo1-rdmamediatek,mt8195-vdo1-rdmay.( ]c6 v \merge@1c10c0006mediatek,mt8188-disp-mergemediatek,mt8195-disp-mergey. .mergemerge_async(6!. \ merge@1c10d0006mediatek,mt8188-disp-mergemediatek,mt8195-disp-mergey. .mergemerge_async(6!. \ merge@1c10e0006mediatek,mt8188-disp-mergemediatek,mt8195-disp-mergey. .mergemerge_async(6!. \ merge@1c10f0006mediatek,mt8188-disp-mergemediatek,mt8195-disp-mergey. .mergemerge_async(6!. \ merge@1c1100006mediatek,mt8188-disp-mergemediatek,mt8195-disp-mergey. .mergemerge_async(6!. \ dp-intf@1c113000mediatek,mt8188-dp-intfy0.:.!pixelenginepll(6 Edisabledethdr@1c1140006mediatek,mt8188-disp-ethdrmediatek,mt8195-disp-ethdrpy@Pp4#mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsh.0.+...,./.-.<.1.2.3.4.5"mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsvdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncethdr_top(6 ]d]e6(!.1.2.3.4.5p \@\P\p\\\\padding@1c11d000mediatek,mt8188-disp-paddingy.6 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compatibleinterrupt-parent#address-cells#size-cellsmodeldp-intf0dp-intf1dsc0ethdr0gce0gce1merge0merge1merge2merge3merge4merge5mutex0mutex1padding0padding1padding2padding3padding4padding5padding6padding7vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7serial0i2c0i2c1i2c2i2c3i2c4i2c5i2c6mmc0device_typeregenable-methodclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheperformance-domains#cooling-cellsphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-output-namesopp-sharedopp-hzopp-microvoltopp-supported-hwinterruptsmediatek,platformstatuspolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicedma-ranges#performance-domain-cells#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxbias-pull-upinput-enabledrive-strengthbias-pull-downbias-disable#power-domain-cellsclocksclock-namesmediatek,infracfgmediatek,disable-extrst#sound-dai-cellsinterrupts-extended#io-channel-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modesassigned-clocksassigned-clock-parents#iommu-cells#mbox-cellsmemory-regionpower-domainsresetsreset-namesmediatek,topckgenmboxesmbox-namespinctrl-namespinctrl-0nvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsphyswakeup-sourcemediatek,syscon-wakeupinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrsnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,prioritysnps,weightbus-widthhs400-ds-delaymax-frequencycap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vsupports-cqecap-mmc-hw-resetno-sdiono-sdnon-removablevmmc-supplyvqmmc-supplypinctrl-1clock-divbus-rangelinux,pci-domaininterrupt-mapinterrupt-map-maskiommu-mapiommu-map-maskphy-namesspi-max-frequency#phy-cellsbitsoperating-points-v2power-domain-names#dma-cellsiommusmediatek,gce-client-regmediatek,gce-eventsmediatek,scpmediatek,larb-idmediatek,smimediatek,larbsremote-endpointmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzstdout-pathno-map