8($mediatek,mt8186-evbmediatek,mt8186 +!7MediaTek MT8186 evaluation board =embeddedaliasesJ/soc/ovl@14005000O/soc/ovl@14006000W/soc/rdma@14007000]/soc/rdma@1401f000c/soc/serial@11002000fhctl@1000ce00mediatek,mt8186-fhctlk r vdisabledccimediatek,mt8186-ccik}cciintermediate!opp-table-ccioperating-points-v2opp-500000000e 'opp-560000000!` Lopp-612000000$za opp-682000000(~ opp-752000000,Ҝ YF opp-8220000000  opp-8750000004'p  opp-9270000007@ 5 opp-980000000:i ~> opp-1050000000> opp-1120000000B )$opp-1155000000D opp-1190000000F opp-1260000000K~opp-1330000000OF0)opp-1400000000SrNRopp-table-cluster0operating-points-v2opp-500000000e 'opp-774000000."M Lopp-8750000004'p `opp-975000000:Q opp-1075000000@2 q opp-1175000000F  X opp-1275000000K 5 opp-1375000000Q  opp-1500000000Yh/  opp-1618000000`p Yopp-1666000000cM$ opp-1733000000gK{@Hopp-1800000000kI~opp-1866000000o8opp-1933000000s7=@Zopp-2000000000w5Ropp-table-cluster1operating-points-v2"opp-774000000."M Lopp-8350000001 opp-9190000006 opp-1002000000;N YFopp-1085000000@@ X opp-1169000000E@ 5 opp-1308000000M  opp-1419000000T8 Y opp-1530000000[1 t opp-1670000000c-Zopp-1733000000gK{@opp-1796000000k sopp-1860000000nYԼopp-1923000000r6dopp-1986000000v_vopp-2050000000z0cpus+cpu-mapcluster0core0core1core2core3core4core5core6core7cpu@0cpuarm,cortex-a55rpsciw5k}cpuintermediateT~.>K@]jw@ !cpu@100cpuarm,cortex-a55rpsciw5k}cpuintermediateT~.>K@]jw@ !cpu@200cpuarm,cortex-a55rpsciw5k}cpuintermediateT~.>K@]jw@ !cpu@300cpuarm,cortex-a55rpsciw5k}cpuintermediateT~.>K@]jw@ !cpu@400cpuarm,cortex-a55rpsciw5k}cpuintermediateT~.>K@]jw@ !cpu@500cpuarm,cortex-a55rpsciw5k}cpuintermediateT~.>K@]jw@ !cpu@600cpuarm,cortex-a76rpsciz0k}cpuintermediate"O.#$>K@]jw@%!cpu@700cpuarm,cortex-a76rpsciz0k}cpuintermediate"O.#$>K@]jw@%!idle-statespscicpu-retention-larm,idle-state2 d@cpu-retention-barm,idle-state2 dx#cpu-off-larm,idle-stated 4cpu-off-barm,idle-stated l$l2-cache0cache*@M@_&6 l2-cache1cache*@M@_&6%l3-cachecache*@M@_6&fixed-factor-clock-13mfixed-factor-clockDk'Q[fclk13m4oscillator-26m fixed-clockDfclk26m'oscillator-32k fixed-clockDfclk32kopp-table-gpuoperating-points-v2Mopp-299000000` Xyopp-332000000 hyopp-366000000з <yopp-400000000ׄ Ҧyopp-434000000P zyopp-484000000A 4Nyopp-535000000s }yopp-586000000" `yopp-637000000%@ 4yopp-690000000)  @yopp-743000000,IG yopp-796000000/q yopp-8500000002 5yopp-900000000-35 Pyopp-900000000-45 |yopp-900000000-55 y opp-950000000-38ـ yopp-950000000-48ـ Yyopp-950000000-58ـ Py opp-1000000000-3;~yopp-1000000000-4; tyopp-1000000000-5; Yy pmu-a55arm,cortex-a55-pmu (pmu-a76arm,cortex-a76-pmu )psci arm,psci-1.0smctimerarm,armv8-timer @   soc+ simple-businterrupt-controller@c000000 arm,gic-v3  r    ppi-partitionsinterrupt-partition-0(interrupt-partition-1)syscon@c53a000mediatek,mt8186-mcusyssysconr SDsyscon@10000000 mediatek,mt8186-topckgensysconrD+syscon@10001000#mediatek,mt8186-infracfg_aosysconrD,syscon@10003000mediatek,mt8186-pericfgsysconr0Hpinctrl@10005000mediatek,mt8186-pinctrlrP "$&*,Biocfg0iocfg_ltiocfg_lmiocfg_lbiocfg_bliocfg_rbiocfg_rteint **i2c0-default-pins9pins-bus%,9Qi2c1-default-pins:pins-bus%,9Qi2c2-default-pins;pins-bus%,9Qi2c3-default-pins<pins-bus%,9Qi2c4-default-pins=pins-bus%,9Qi2c5-default-pins>pins-bus%,9Qi2c6-default-pins?pins-bus%^9Qi2c7-default-pins@pins-bus%,9Qi2c8-default-pinsApins-bus%,9Qi2c9-default-pinsEpins-bus%^9Qsyscon@10006000)mediatek,mt8186-scpsyssysconsimple-mfdr`power-controller!mediatek,mt8186-power-controller+k7power-domain@0rk+}mfg00+kpower-domain@1r,+kpower-domain@2rkpower-domain@3rkpower-domain@17rk++$}subsys-csirx-top0subsys-csirx-top1kpower-domain@4rk+,=}sys_ckref_ckkpower-domain@5rk,B,?}sys_ckref_ckkpower-domain@18rk+/+>}audioadspsubsys-adsp-bus+kpower-domain@19r+kpower-domain@20r,kpower-domain@16r,kpower-domain@6r0k+*++- ---M}dispmdpsubsys-smi-infrasubsys-smi-commonsubsys-smi-galssubsys-smi-iommu,+kpower-domain@14rk+). }vdec0larb,kpower-domain@10r 8k++++ /+#+%6}cam0cam1cam2cam3galssubsys-cam-tmsubsys-cam-top,+kpower-domain@12r kpower-domain@11r kpower-domain@7rk0+&}galssubsys-img-top,+kpower-domain@8rkpower-domain@9r (k+'1111P}subsys-ipe-topsubsys-ipe-larb0subsys-ipe-larb1subsys-ipe-smisubsys-ipe-gals,kpower-domain@13r k+$2}venc0subsys-larb,kpower-domain@15rk+:33%}wpe0subsys-larb-cksubsys-larb-pclk,kwatchdog@10007000mediatek,mt8186-wdtrpFsyscon@1000c000"mediatek,mt8186-apmixedsyssysconrDpwrap@1000d000mediatek,mt8186-pwrapsysconrpwrapk,, }spiwrapspmi@10015000*mediatek,mt8186-spmimediatek,mt8195-spmi rP pmifspmimstk,,+2(}pmif_sys_ckpmif_tmr_ckspmimst_clk_mux+2+t  vdisabledtimer@10017000,mediatek,mt8186-timermediatek,mt6765-timerrpk4mailbox@1022c000mediatek,mt8186-gcer"@k,}gceNscp@10500000mediatek,mt8186-scp rP\ sramcfgaadsp@10680000mediatek,mt8186-dsp@rh hhcfgsramsecbusk+/+>}audiodspadsp_bus+/+> '+Erxtx567 vdisabledmailbox@10686100mediatek,mt8186-adsp-mboxrhai5mailbox@10687100mediatek,mt8186-adsp-mboxrhqj6spi@11000000mediatek,mt8186-norr k+3,O,c,d}spisfaxiaxi_s+3+X% vdisabledadc@11001000.mediatek,mt8186-auxadcmediatek,mt8173-auxadcrk,"}mainserial@11002000*mediatek,mt8186-uartmediatek,mt6577-uartr p k', }baudbusvokayserial@11003000*mediatek,mt8186-uartmediatek,mt6577-uartr0q k', }baudbus vdisabledi2c@11007000mediatek,mt8186-i2c rp ik8,' }maindmaQ+vokaydefault9i2c@11008000mediatek,mt8186-i2c r jk8,' }maindmaQ+vokay&@default:i2c@11009000mediatek,mt8186-i2c r kk8,' }maindmaQ+vokay&'default;i2c@1100f000mediatek,mt8186-i2c r lk8,' }maindmaQ+vokaydefault<i2c@11011000mediatek,mt8186-i2c r mk8,' }maindmaQ+vokaydefault=i2c@11016000mediatek,mt8186-i2c r` bk8,' }maindmaQ+vokaydefault>i2c@1100d000mediatek,mt8186-i2c r ck8,' }maindmaQ+vokaydefault?i2c@11004000mediatek,mt8186-i2c r@ nk8,' }maindmaQ+vokaydefault@i2c@11005000mediatek,mt8186-i2c rP ok8,' }maindmaQ+vokaydefaultAspi@1100a000(mediatek,mt8186-spimediatek,mt6765-spi+rk+K+ ,}parent-clksel-clkspi-clk vdisabledthermal-sensor@1100b000mediatek,mt8186-lvtsrck, @,GBC$Slvts-calib-data-1lvts-calib-data-2desvs@1100bc00mediatek,mt8186-svsrk, }mainGDB(Ssvs-calibration-datat-calibration-data@,zsvs_rstpwm@1100e0002mediatek,mt8186-disp-pwmmediatek,mt8183-disp-pwmrk+,4}mainmm vdisabledspi@11010000(mediatek,mt8186-spimediatek,mt6765-spi+rk+K+ ,8}parent-clksel-clkspi-clk vdisabledspi@11012000(mediatek,mt8186-spimediatek,mt6765-spi+r k+K+ ,;}parent-clksel-clkspi-clk vdisabledspi@11013000(mediatek,mt8186-spimediatek,mt6765-spi+r0k+K+ ,<}parent-clksel-clkspi-clk vdisabledspi@11014000(mediatek,mt8186-spimediatek,mt6765-spi+r@tk+K+ ,J}parent-clksel-clkspi-clk vdisabledspi@11015000(mediatek,mt8186-spimediatek,mt6765-spi+rPuk+K+ ,K}parent-clksel-clkspi-clk vdisabledclock-controller@11017000mediatek,mt8186-imp_iic_wraprpD8serial@11018000*mediatek,mt8186-uartmediatek,mt6577-uartr k', }baudbus vdisabledi2c@11019000mediatek,mt8186-i2c r dk8 ,' }maindmaQ+vokaydefaultEaudio-controller@11210000mediatek,mt8186-soundr! k,,,6+++F+ + ++e++h+?+@+A+B+C++++++,'}}aud_infra_clkmtkaif_26m_clktop_mux_audiotop_mux_audio_inttop_mainpll_d2_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d8top_mux_aud_eng2top_apll2_d8top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s4_m_seltop_tdm_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div4top_apll12_div_tdmtop_mux_audio_htop_clk26m_clk,+@F zaudiosys vdisabledusb@11201000#mediatek,mt8186-mtu3mediatek,mtu3 r - > macippc(k+,=,3,,>$}sys_ckref_ckmcu_ckdma_ckxhci_ck/G7+ H  vdisabledusb@11200000'mediatek,mt8186-xhcimediatek,mtk-xhcir mac(k+,=,3,,>$}sys_ckref_ckmcu_ckdma_ckxhci_ck& vdisabledmmc@11230000(mediatek,mt8186-mmcmediatek,mt8183-mmc r# k+ ,,U,}sourcehclksource_cgcryptod+  vdisabledmmc@11240000(mediatek,mt8186-mmcmediatek,mt8183-mmc r$k+,,V}sourcehclksource_cge++o vdisabledusb@11281000#mediatek,mt8186-mtu3mediatek,mtu3 r(-(> macippc$k,B,?,7',@$}sys_ckref_ckmcu_ckdma_ckxhci_ckKIJ7+ H$ vdisabledusb@11280000'mediatek,mt8186-xhcimediatek,mtk-xhcir(mac$k,B,?,7',@$}sys_ckref_ckmcu_ckdma_ckxhci_ckD vdisabledt-phy@11c80000.mediatek,mt8186-tphymediatek,generic-tphy-v2+vokayusb-phy@0rk'}refIusb-phy@700r k'}refJt-phy@11ca0000.mediatek,mt8186-tphymediatek,generic-tphy-v2+vokayusb-phy@0rk'}refGefuse@11cb0000%mediatek,mt8186-efusemediatek,efuser+lvts1-calib@1ccrBlvts2-calib@2f8rCcalib@550rPPDgpu-speedbin@59crLsocinfo-data1@7a0rdsi-phy@11cc0000mediatek,mt8183-mipi-txrk'D fmipi_tx0_pll vdisabledQclock-controller@13000000mediatek,mt8186-mfgsysrDKgpu@13040000&mediatek,mt8186-maliarm,mali-bifrostr@kK0 jobmmugpu77 core0core1GL Sspeed-binMO vdisabledjsyscon@14000000mediatek,mt8186-mmsyssysconrDNN$N-mutex@14001000mediatek,mt8186-disp-mutexrk-'$N<7smi@14002000mediatek,mt8186-smi-commonr  k----}apbsmigals0gals17Osmi@14003000mediatek,mt8186-smi-larbr0k--}apbsmiPaO7Rsmi@14004000mediatek,mt8186-smi-larbr@k--}apbsmiPaO7Sovl@140050002mediatek,mt8186-disp-ovlmediatek,mt8192-disp-ovlrPk-)nP$NP7ovl@140060008mediatek,mt8186-disp-ovl-2lmediatek,mt8192-disp-ovl-2lr`k-*nP!$N`7rdma@140070004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdmarpk-+nP"$Np7color@140090006mediatek,mt8186-disp-colormediatek,mt8173-disp-colorrk- -$N7dpi@1400a000mediatek,mt8186-dpirk+;- }pixelenginepll+;+j57 vdisabledportendpointccorr@1400b0006mediatek,mt8186-disp-ccorrmediatek,mt8192-disp-ccorrrk-.$N7aal@1400c0002mediatek,mt8186-disp-aalmediatek,mt8183-disp-aalrk-0$N7gamma@1400d0006mediatek,mt8186-disp-gammamediatek,mt8183-disp-gammark- 1$N7postmask@1400e000<mediatek,mt8186-disp-postmaskmediatek,mt8192-disp-postmaskrk- 2$N7dither@1400f0008mediatek,mt8186-disp-dithermediatek,mt8183-disp-ditherrk-3$N7dsi@14013000mediatek,mt8186-dsir0k--Q}enginedigitalhs77@-Qudphy vdisabledportendpointiommu@14016000mediatek,mt8186-iommu-mmr`k-}bclk98RSTUVWXYZ[\]^_7Prdma@1401f0004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdmark-4nP $N7clock-controller@14020000mediatek,mt8186-wpesysrD3smi@14023000mediatek,mt8186-smi-larbr0k33}apbsmiPaO7Wclock-controller@15020000mediatek,mt8186-imgsys1rD0smi@1502e000mediatek,mt8186-smi-larbrk00}apbsmiP aO7Xclock-controller@15820000mediatek,mt8186-imgsys2rD`smi@1582e000mediatek,mt8186-smi-larbrk0`}apbsmiP aO7Yvideo-decoder@16000000mediatek,mt8186-vcodec-decr+@nPavideo-codec@16025000mediatek,mtk-vcodec-corerPW`nPPPPPPPPPPPP k+)..+U%}vdec-selvdec-soc-vdecvdecvdec-top+)+U7smi@1602e000mediatek,mt8186-smi-larbrk..}apbsmiPaO7Uclock-controller@1602f000mediatek,mt8186-vdecsysrD.clock-controller@17000000mediatek,mt8186-vencsysrD2smi@17010000mediatek,mt8186-smi-larbrk22}apbsmiPaO7 Vvideo-encoder@170200006mediatek,mt8186-vcodec-encmediatek,mt8183-vcodec-encr HnPPPPPPPPPk2 }venc_sel+$+U7 ajpeg-encoder@17030000+mediatek,mt8186-jpgencmediatek,mtk-jpgencrk2}jpgenc nPPPP7 clock-controller@1a000000mediatek,mt8186-camsysrD/smi@1a001000mediatek,mt8186-smi-larbrk//}apbsmiP aO7 Zsmi@1a002000mediatek,mt8186-smi-larbr k//}apbsmiPaO7 [smi@1a00f000mediatek,mt8186-smi-larbrk/b}apbsmiPaO7 \smi@1a010000mediatek,mt8186-smi-larbrk/c}apbsmiPaO7 ]clock-controller@1a04f000mediatek,mt8186-camsys_rawarDbclock-controller@1a06f000mediatek,mt8186-camsys_rawbrDcclock-controller@1b000000mediatek,mt8186-mdpsysrDdsmi@1b002000mediatek,mt8186-smi-larbr kdd}apbsmiPaO7Tclock-controller@1c000000mediatek,mt8186-ipesysrD1smi@1c00f000mediatek,mt8186-smi-larbrk11}apbsmiPaO7 _smi@1c10f000mediatek,mt8186-smi-larbrk11}apbsmiPaO7 ^thermal-zonescpu-little0-thermaletripstrip-alert0LEpassiveftrip-alert1sEhottrip-crit Ecriticalcooling-mapsmap0fHcpu-little1-thermaletripstrip-alert0LEpassivegtrip-alert1sEhottrip-crit Ecriticalcooling-mapsmap0gHcpu-little2-thermaletripstrip-alert0LEpassivehtrip-alert1sEhottrip-crit Ecriticalcooling-mapsmap0hHcam-thermaletripstrip-alert0LEpassivetrip-alert1sEhottrip-crit Ecriticalnna-thermaletripstrip-alert0LEpassivetrip-alert1sEhottrip-crit Ecriticaladsp-thermaletripstrip-alert0LEpassivetrip-alert1sEhottrip-crit Ecriticalgpu-thermaletripstrip-alert0LEpassiveitrip-alert1sEhottrip-crit Ecriticalcooling-mapsmap0i jcpu-big0-thermaldetripstrip-alert0LEpassivektrip-alert1sEhottrip-crit Ecriticalcooling-mapsmap0kcpu-big1-thermaldetripstrip-alert0LEpassiveltrip-alert1sEhottrip-crit Ecriticalcooling-mapsmap0lchosenserial0:921600n8memory@40000000memoryr@ compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeovl0ovl-2l0rdma0rdma1serial0clocksregstatusclock-namesoperating-points-v2phandleopp-sharedopp-hzopp-microvoltrequired-oppscpudevice_typeenable-methodclock-frequencydynamic-power-coefficientcapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsmediatek,ccientry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-divclock-multclock-output-namesopp-supported-hwinterruptsdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxbias-disabledrive-strength-microampinput-enablebias-pull-up#power-domain-cellsmediatek,infracfgmediatek,disable-extrstassigned-clocksassigned-clock-parents#mbox-cellsmbox-namesmboxespower-domains#io-channel-cellspinctrl-namespinctrl-0i2c-scl-internal-delay-nsresetsnvmem-cellsnvmem-cell-names#thermal-sensor-cellsreset-names#pwm-cellsmediatek,apmixedsysmediatek,topckgenphyswakeup-sourcemediatek,syscon-wakeup#phy-cellsmediatek,discthbitsinterrupt-namespower-domain-namesmediatek,gce-client-regmediatek,gce-eventsmediatek,larb-idmediatek,smiiommusphy-namesmediatek,larbs#iommu-cellsmediatek,scppolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-path