_8Y(YMarvell Armada CN9130-CRB-B>!marvell,cn9130marvell,armada-ap807-quadmarvell,armada-ap807aliases ,/soc/bus@f0000000/serial@512000 4/soc/bus@f0000000/serial@5121005-tutmi@580000!marvell,cp110-utmi-phyX  disabledusb-phy@0usb-phy@1usb@500000$!marvell,armada-8k-xhcigeneric-xhciP@j coreregokayR.Zusb/usb@510000$!marvell,armada-8k-xhcigeneric-xhciQ@i coreregokayR0Zusb1sata@540000$!marvell,armada-8k-ahcigeneric-ahciTkokaysata-port@0okay2sata-port@1 disabledxor@6a0000%!marvell,armada-7k-xormarvell,xor-v2jk coreregxor@6c0000%!marvell,armada-7k-xormarvell,xor-v2lm coreregspi@700600!marvell,armada-380-spipP coreaxi disabledspi@700680!marvell,armada-380-spipP coreaxiokaydefaultd3flash@0!jedec,spi-nornbZpartitions!fixed-partitionspartition@0U-Boot partition@400000 Filesystem i2c@701000!marvell,mv78230-i2cp x coreregokaydefaultd4mcp23x17@20!microchip,mcp23017/? okay=i2c@701100!marvell,mv78230-i2cp y coreregokaydefaultd5?serial@702000!snps,dw-apb-uartp zbaudclkapb_pclk disabledserial@702100!snps,dw-apb-uartp!{baudclkapb_pclk disabledserial@702200!snps,dw-apb-uartp"|baudclkapb_pclk disabledserial@702300!snps,dw-apb-uartp#}baudclkapb_pclk disablednand-controller@720000D!marvell,armada-8k-nand-controllermarvell,armada370-nand-controllerrTs corereg disabledtrng@7600003!marvell,armada-8k-rnginside-secure,safexcel-eip76v}_ coreregokaymmc@780000!marvell,armada-cp110-sdhcix coreaxiokaydefaultd67 89:crypto@800000!inside-secure,safexcel-eip197b 0XYZ[\W ring0ring1ring2ring3eipmem coreregpcie@f2600000#!marvell,armada8k-pciesnps,dw-pcie ` 4ctrlconfigpci corereg okay;0< < < pcie@f2620000#!marvell,armada8k-pciesnps,dw-pcie b 4ctrlconfigpci corereg  disabledpcie@f2640000#!marvell,armada8k-pciesnps,dw-pcie d 4ctrlconfigpci corereg  disabledchosenserial0:115200n8memory@0memoryregulator-1!regulator-gpio  ap0_mmc_vccqw@32Z )=Kw@2Zregulator-2!regulator-fixed cp0-xhci1-vbusLK@3LK@R e=>usb-phy-1!usb-nop-xceiv.usb-phy-2!usb-nop-xceivj>0regulator-3!regulator-gpio  cp0_sd_vccqw@32Z )8Kw@2Z9regulator-4!regulator-fixed  cp0_sd_vcc2Z32Z e8Ru:sfp!sff,sfp? = = =   ) #address-cells#size-cellsmodelcompatibleserial0serial1gpio0spi0gpio1gpio2spi1spi2i2c0ethernet0ethernet1ethernet2methodrangesregno-mapinterrupt-parentinterruptsdma-coherent#iommu-cells#global-interruptsstatusphandle#interrupt-cellsinterrupt-controllermsi-controllerarm,msi-base-spiarm,msi-num-spismarvell,odmi-framesmarvell,spi-basemarvell,spi-rangesmsi-parentclocksreg-shiftreg-io-widthclock-namesmarvell,xenon-phy-slow-modepinctrl-namesbus-widthmmc-ddr-1_8vvqmmc-supplymarvell,pinsmarvell,functionoffsetngpiosgpio-controller#gpio-cellsgpio-rangesmarvell,pwm-offset#pwm-cells#clock-cells#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistypetripcooling-devicedevice_typeenable-method#cooling-cellsi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecache-levelcache-unifiedmarvell,system-controllerinterrupt-namesport-idgop-port-idphy-modemanagedphysphy#phy-cellsdsa,memberlabelphy-handlesfpethernetreg-namesinterrupts-extendedusb-phyphy-namespinctrl-0spi-max-frequencyclock-frequencycd-gpiosvmmc-supplybus-rangeinterrupt-map-maskinterrupt-mapnum-lanesnum-viewportiommu-mapiommu-map-maskstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltstatesenable-active-highgpiovcc-supplyregulator-always-oni2c-busmod-def0-gpioslos-gpiostx-disable-gpiostx-fault-gpiosmaximum-power-milliwatt