╨ ■эb▒8]<(u]Globalscale MOCHAbinW!globalscale,mochabinmarvell,armada7040marvell,armada-ap806-quadmarvell,armada-ap806aliases ,/soc/bus@f0000000/serial@512000 4/soc/bus@f0000000/serial@5121005Цpartition@3e0000;hw-info▒>Цpartition@3f0000;u-boot-env▒?i2c@701000!marvell,mv78230-i2c▒p ═x фcoreregоokay╓default╠4аЖа>pca9554@39!nxp,pca9554╓default╠5▒9╝#═%=M=i2c@701100!marvell,mv78230-i2c▒p ═y фcoreregоokay╓default╠6аЖа<leds@64!issi,is31fl3199╓default╠7░#▒dled@1 ;red:led1▒┐N led@2;green:led1▒led@3 ;blue:led1▒led@4 ;red:led2▒led@5;green:led2▒led@6 ;blue:led2▒led@7 ;red:led3▒led@8;green:led3▒led@9 ;blue:led3▒ serial@702000!snps,dw-apb-uart▒p ╡═z┐фbaudclkapb_pclkоokay╓default╠8serial@702100!snps,dw-apb-uart▒p!╡═{┐фbaudclkapb_pclkо disabledserial@702200!snps,dw-apb-uart▒p"╡═|┐фbaudclkapb_pclkо disabledserial@702300!snps,dw-apb-uart▒p#╡═}┐фbaudclkapb_pclkо disablednand-controller@720000D!marvell,armada-8k-nand-controllermarvell,armada370-nand-controller▒rT═s фcoreregо╢ disabledtrng@7600003!marvell,armada-8k-rnginside-secure,safexcel-eip76▒v}═_ фcoreregоokaymmc@780000!marvell,armada-cp110-sdhci▒x═ фcoreaxiо╪ disableds-Ecrypto@800000!inside-secure,safexcel-eip197b▒А 0═XYZ[\W ╨ring0ring1ring2ring3eipmem фcoreregо╪pcie@f2600000#!marvell,armada8k-pciesnps,dw-pcie ▒Є`ЎЁUctrlconfig pci╪г╨ кВЎЎЁ┌э═√ фcoreregо disabled0-А -а -└ pcie@f2620000#!marvell,armada8k-pciesnps,dw-pcie ▒ЄbўЁUctrlconfig pci╪г╨ кВўўЁ┌э═√ фcoreregо disabledpcie@f2640000#!marvell,armada8k-pciesnps,dw-pcie ▒Єd°ЁUctrlconfig pci╪г╨ кВ└└┌э═√ фcoreregоokay╓defaultclkreq╠9:¤;zcp0-pcie2-x1-phy/# chosen(serial0:115200n8sfp-eth0!sff,sfp4<<=F=U=f=sfp-eth2!sff,sfp4><=F=U=f=! #address-cells#size-cellsmodelcompatibleserial0serial1gpio0spi0gpio1gpio2spi1spi2ethernet0ethernet1ethernet2ethernet3ethernet4ethernet5ethernet6methodrangesregno-mapinterrupt-parentinterruptsdma-coherent#iommu-cells#global-interruptsstatusphandle#interrupt-cellsinterrupt-controllermsi-controllerarm,msi-base-spiarm,msi-num-spismarvell,odmi-framesmarvell,spi-basemarvell,spi-rangesmsi-parentclocksreg-shiftreg-io-widthpinctrl-0pinctrl-namesclock-namesbus-widthnon-removableno-1-8-vmarvell,pinsmarvell,functionoffsetngpiosgpio-controller#gpio-cellsgpio-rangesmarvell,pwm-offset#pwm-cells#clock-cells#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistypetripcooling-devicedevice_typeenable-method#cooling-cellsi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecache-levelcache-unifiedmarvell,system-controllerinterrupt-namesport-idgop-port-idphy-modephysmanagedsfpspeedfull-duplexphy#phy-cellsreset-gpioslabelphy-handleethernetreg-namesinterrupts-extendediommusphy-namesspi-max-frequencyread-onlyclock-frequencyshutdown-gpiosled-max-microampbus-rangeinterrupt-map-maskinterrupt-mapnum-lanesiommu-mapiommu-map-maskpinctrl-1stdout-pathi2c-buslos-gpiosmod-def0-gpiostx-disable-gpiostx-fault-gpios