p8( azw,beelink-a1rockchip,rk3328 + 7Beelink A1aliases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000/ethernet@ff540000/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci@&3@@R_p{ cpu@1cpuarm,cortex-a53xpsci@&3@@R_p{ cpu@2cpuarm,cortex-a53xpsci@&3@@R_p{ cpu@3cpuarm,cortex-a53xpsci@&3@@R_p{ idle-statespscicpu-sleeparm,idle-statex{l2-cachecache @({opp-table-0operating-points-v2{opp-408000000Q~$@5opp-600000000#F~$@opp-8160000000,B@$@opp-1008000000<$@opp-1200000000G($@opp-1296000000M?d $@analog-soundsimple-audio-cardAi2sZ tAnalog A/Vokaysimple-audio-card,cpusimple-audio-card,codecarm-pmuarm,cortex-a53-pmu0defg display-subsystemrockchip,display-subsystem hdmi-soundsimple-audio-cardAi2sZtHDMIokaysimple-audio-card,cpusimple-audio-card,codecpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0   xin24m fixed-clockn6xin24m{Hi2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s )7i2s_clki2s_hclk  txrx okay{i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s *8i2s_clki2s_hclktxrx okay{i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s +9i2s_clki2s_hclktxrx  disabledspdif@ff030000rockchip,rk3328-spdif .: mclkhclk txdefault* okay{opdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclkrxdefaultsleep*4 disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd{Eio-domains"rockchip,rk3328-io-voltage-domainokay>LZhvgpiorockchip,rk3328-grf-gpio{Gpower-controller!rockchip,rk3328-power-controller+{;power-domain@1power-domain@6Dpower-domain@5 BABpower-domain@8Freboot-modesyscon-reboot-modeRBRBRB RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart 7&baudclkapb_pclktxrxdefault * !  disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart 8'baudclkapb_pclktxrxdefault *"#$  disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart 9(baudclkapb_pclktxrxdefault*% okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c $+7 i2cpclkdefault*& disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c %+8 i2cpclkdefault*'okayB@#;Spmic@18rockchip,rk805 (default*)Rjx****regulatorsDCDC_REG1 vdd_logic `p{<regulator-state-mem%=B@DCDC_REG2vdd_arm `p{regulator-state-mem%=~DCDC_REG3vcc_ddrregulator-state-mem%DCDC_REG4vcc_io2Z2Z{regulator-state-mem%=2ZLDO_REG1vdd_18w@w@{regulator-state-mem%=w@LDO_REG2 vcc_18emmcw@w@{regulator-state-mem%=w@LDO_REG3vdd_11regulator-state-mem%=i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c &+9 i2cpclkdefault*+ disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c '+: i2cpclkdefault*, disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi 1+ spiclkapb_pclk txrxdefault*-./0 disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt (pwm@ff1b0000rockchip,rk3328-pwm< pwmpclkdefault*1Y disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclkdefault*2Y disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclkdefault*3Y disabledpwm@ff1b0030rockchip,rk3328-pwm0< pwmpclkdefault*4Y disableddma-controller@ff1f0000arm,pl330arm,primecell@d apb_pclk{{thermal-zonessoc-thermal5tripstrip-point0ppassivetrip-point1Lpassive{6soc-crits criticalcooling-mapsmap060 map16 7tsadc@ff250000rockchip,rk3328-tsadc% :$P$tsadcapb_pclkinitdefaultsleep*849)83B :tsadc-apbF]okays{5efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efuse id@7cpu-leakage@17logic-leakage@19cpu-version@1a{Iadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( P%saradcapb_pclk3V :saradc-apb disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500TZW]XY[\"gpgpmmupppp0ppmmu0pp1ppmmu1 buscore:;3f<{7opp-table-gpuoperating-points-v2{:opp-200000000 g8opp-300000000g8opp-400000000ׄg8opp-500000000e0 disablediommu@ff330200rockchip,iommu3 ` aclkiface disablediommu@ff340800rockchip,iommu4@ bF aclkiface disabledvideo-codec@ff350000rockchip,rk3328-vpu5  vdpuF aclkhclk=;iommu@ff350800rockchip,iommu5@  F aclkiface;{=video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6  BABaxiahbcabaccoreAB ׄׄ>;iommu@ff360480rockchip,iommu 6@6@ JB aclkiface;{>vop@ff370000rockchip,rk3328-vop7>  x;aclk_vopdclk_vophclk_vop3 :axiahbdclk?okayport{ endpoint@{Fiommu@ff373f00rockchip,iommu7?  ; aclkifaceokay{?hdmi@ff3c0000rockchip,rk3328-dw-hdmi<  #FiahbisfrcecA#hdmidefault *BCD-E okay{ports+port@0endpointF{@port@1codec@ff410000rockchip,rk3328-codecA* pclkmclk-E okay :G{phy@ff430000rockchip,rk3328-hdmi-phyC SHysysclkrefoclkrefpclk hdmi_phyEI Qcpu-versionbokay{Aclock-controller@ff440000rockchip,rk3328-cruDHxin24m-Emx=&'(ABDC"\5H4$zzHHH|n6n6n6ׄn6#FLGрxhxhрxhxh{syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyHphyclk usb480m_phy{zJokay{Jotg-portb$;<=otg-bvalidotg-idlinestateokay{Xhost-portb > linestateokay{Ymmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@   =!JNbiuciuciu-driveciu-sampleр3m:resetokaydefault*KLMNmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@   >"KObiuciuciu-driveciu-sampleр3n:reset disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@  ?#LPbiuciuciu-driveciu-sampleр3o:resetokay%default *OPQethernet@ff540000rockchip,rk3328-gmacT macirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3c :stmmaceth-E3AOokaydfzRRZinputgSrrgmii{default*T&mdiosnps,dwmac-mdio+ethernet-phy@0'u0 ({Sethernet@ff550000rockchip,rk3328-gmacU-E macirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphy3b :stmmacethrrmiigU3AOZoutput disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22V3ddefault*VW{Uusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X Motghost @ X #usb2-phyokayusb@ff5c0000 generic-ehci\  NJY#usbokaydefault*Z[\]^_usb@ff5d0000 generic-ohci]  NJY#usb disabledmmc@ff5f00000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc_@  @MQbiuciuciu-driveciu-sampleр3h:reset disabledusb@ff600000rockchip,rk3328-dwc3snps,dwc3` C`aref_clksuspend_clkbus_clkhost utmi_wide " C [ }  okayinterrupt-controller@ff811000 arm,gic-400  @ @ `   {crypto@ff060000rockchip,rk3328-crypto@ PQ;hclk_masterhclk_slavesclk3D :crypto-rstpinctrlrockchip,rk3328-pinctrl-E+ gpio@ff210000rockchip,gpio-bank! 3  {mgpio@ff220000rockchip,gpio-bank" 4  gpio@ff230000rockchip,gpio-bank# 5  {(gpio@ff240000rockchip,gpio-bank$ 6  pcfg-pull-up {bpcfg-pull-down {jpcfg-pull-none {`pcfg-pull-none-2ma  &{ipcfg-pull-up-2ma  &pcfg-pull-up-4ma  &{cpcfg-pull-none-4ma  &{fpcfg-pull-down-4ma  &pcfg-pull-none-8ma  &{dpcfg-pull-up-8ma  &{epcfg-pull-none-12ma  & {gpcfg-pull-up-12ma  & {hpcfg-output-high 5{lpcfg-output-low A{kpcfg-input-high  L{apcfg-input Li2c0i2c0-xfer Y``{&i2c1i2c1-xfer Y``{'i2c2i2c2-xfer Y ``{+i2c3i2c3-xfer Y``{,i2c3-pins Y``hdmi_i2chdmii2c-xfer Y``{Cpdm-0pdmm0-clk Y`{pdmm0-fsync Y`pdmm0-sdi0 Y`{pdmm0-sdi1 Y`{pdmm0-sdi2 Y`{pdmm0-sdi3 Y`{pdmm0-clk-sleep Ya{pdmm0-sdi0-sleep Ya{pdmm0-sdi1-sleep Ya{pdmm0-sdi2-sleep Ya{pdmm0-sdi3-sleep Ya{pdmm0-fsync-sleep Yatsadcotp-pin Y `{8otp-out Y `{9uart0uart0-xfer Y `b{uart0-cts Y `{ uart0-rts Y `{!uart0-rts-pin Y `uart1uart1-xfer Y`b{"uart1-cts Y`{#uart1-rts Y`{$uart1-rts-pin Y`uart2-0uart2m0-xfer Y`buart2-1uart2m1-xfer Y`b{%spi0-0spi0m0-clk Ybspi0m0-cs0 Y bspi0m0-tx Y bspi0m0-rx Y bspi0m0-cs1 Y bspi0-1spi0m1-clk Ybspi0m1-cs0 Ybspi0m1-tx Ybspi0m1-rx Ybspi0m1-cs1 Ybspi0-2spi0m2-clk Yb{-spi0m2-cs0 Yb{0spi0m2-tx Yb{.spi0m2-rx Yb{/i2s1i2s1-mclk Y`i2s1-sclk Y`i2s1-lrckrx Y`i2s1-lrcktx Y`i2s1-sdi Y`i2s1-sdo Y`i2s1-sdio1 Y`i2s1-sdio2 Y`i2s1-sdio3 Y`i2s1-sleep Yaaaaaaaaai2s2-0i2s2m0-mclk Y`i2s2m0-sclk Y`i2s2m0-lrckrx Y`i2s2m0-lrcktx Y`i2s2m0-sdi Y`i2s2m0-sdo Y`i2s2m0-sleep` Yaaaaaai2s2-1i2s2m1-mclk Y`i2s2m1-sclk Y`i2sm1-lrckrx Y`i2s2m1-lrcktx Y`i2s2m1-sdi Y`i2s2m1-sdo Y`i2s2m1-sleepP Yaaaaaspdif-0spdifm0-tx Y`{spdif-1spdifm1-tx Y`spdif-2spdifm2-tx Y`sdmmc0-0sdmmc0m0-pwren Ycsdmmc0m0-pin Ycsdmmc0-1sdmmc0m1-pwren Ycsdmmc0m1-pin Ycsdmmc0sdmmc0-clk Yd{Ksdmmc0-cmd Ye{Lsdmmc0-dectn Yc{Msdmmc0-wrprt Ycsdmmc0-bus1 Yesdmmc0-bus4@ Yeeee{Nsdmmc0-pins Yccccccccsdmmc0extsdmmc0ext-clk Yfsdmmc0ext-cmd Ycsdmmc0ext-wrprt Ycsdmmc0ext-dectn Ycsdmmc0ext-bus1 Ycsdmmc0ext-bus4@ Yccccsdmmc0ext-pins Yccccccccsdmmc1sdmmc1-clk Y dsdmmc1-cmd Y esdmmc1-pwren Yesdmmc1-wrprt Yesdmmc1-dectn Yesdmmc1-bus1 Yesdmmc1-bus4@ Yeeeesdmmc1-pins Y c ccccccccemmcemmc-clk Yg{Oemmc-cmd Yh{Pemmc-pwren Y`emmc-rstnout Y`emmc-bus1 Yhemmc-bus4@ Yhhhhemmc-bus8 Yhhhhhhhh{Qpwm0pwm0-pin Y`{1pwm1pwm1-pin Y`{2pwm2pwm2-pin Y`{3pwmirpwmir-pin Y`{4gmac-1rgmiim1-pins` Y d ffdfff f fd dffddd dfdddd{Trmiim1-pins Yigiiii i ig g ` `````gmac2phyfephyled-speed10 Y`fephyled-duplex Y`fephyled-rxm1 Y`{Vfephyled-txm1 Y`fephyled-linkm1 Y`{Wtsadc_pintsadc-int Y `tsadc-pin Y `hdmi_pinhdmi-cec Y`{Bhdmi-hpd Yj{Dcif-0dvp-d2d9-m0 Y````` ` ` `````cif-1dvp-d2d9-m1 Y````````````pmicpmic-int-l Yb{)usb3usb30-host-drv Y`{nwifibt-dis Yk{Zbt-wake-host Yb{[chip-en Yk{\host-wake-bt Yl{]wl-dis Yk{^wl-wake-host Yb{_chosen gserial2:1500000n8external-gmac-clock fixed-clocksY@ gmac_clkin{Rregulator-usb3-current-switchregulator-fixed s mdefault*n vcc_host_5v *regulator-vcc-sysregulator-fixedvcc_sysLK@LK@{*ir-receivergpio-ir-receiver ?( rc-beelink-gs1spdif-ditlinux,spdif-dit {pspdif-soundsimple-audio-cardtSPDIFsimple-audio-card,cpuosimple-audio-card,codecp compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1vccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplypmuio-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shifti2c-scl-falling-time-nsi2c-scl-rising-time-nssystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-namespower-domainsmali-supply#iommu-cellsiommusremote-endpointphysphy-namesrockchip,grfmute-gpiosnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplymmc-ddr-1_8vmmc-hs200-1_8vno-sdno-sdionon-removabletx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-handlephy-modephy-supplysnps,pbltx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathenable-active-highgpiovin-supplylinux,rc-map-name