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Wdisabledpwm@ff160020(rockchip,rk3308-pwmrockchip,rk3328-pwm y pwmpclkdefault/ Wdisabledpwm@ff160030(rockchip,rk3308-pwmrockchip,rk3328-pwm0y pwmpclkdefault0 Wdisabledpwm@ff170000(rockchip,rk3308-pwmrockchip,rk3328-pwmx pwmpclkdefault1 Wdisabledpwm@ff170010(rockchip,rk3308-pwmrockchip,rk3328-pwmx pwmpclkdefault2 Wdisabledpwm@ff170020(rockchip,rk3308-pwmrockchip,rk3328-pwm x pwmpclkdefault3 Wdisabledpwm@ff170030(rockchip,rk3308-pwmrockchip,rk3328-pwm0x pwmpclkdefault4 Wdisabledpwm@ff180000(rockchip,rk3308-pwmrockchip,rk3328-pwm pwmpclkdefault5WokayCdpwm@ff180010(rockchip,rk3308-pwmrockchip,rk3328-pwm pwmpclkdefault6 Wdisabledpwm@ff180020(rockchip,rk3308-pwmrockchip,rk3328-pwm  pwmpclkdefault7 Wdisabledpwm@ff180030(rockchip,rk3308-pwmrockchip,rk3328-pwm0 pwmpclkdefault8Wokayrktimer@ff1a0000rockchip,rk3288-timer    pclktimersaradc@ff1e0000.rockchip,rk3308-saradcrockchip,rk3399-saradc  %%saradcapb_pclkF saradc-apbWokay9efuse@ff210000rockchip,rk3308-otp!@+'otpapb_pclkphyTphyid@7cpu-leakage@17logic-leakage@18dma-controller@ff2c0000arm,pl330arm,primecell,@  apb_pclkCdma-controller@ff2d0000arm,pl330arm,primecell-@  apb_pclkC(i2s@ff320000rockchip,rk3308-i2s-tdm2  2mclk_txmclk_rxhclkTVu((zrxtx tx-mrx-m: Wdisabledi2s@ff330000rockchip,rk3308-i2s-tdm3  3mclk_txmclk_rxhclkXZu(zrx tx-mrx-m: Wdisabledi2s@ff350000(rockchip,rk3308-i2srockchip,rk3066-i2s5  4\i2s_clki2s_hclku(( ztxrxreset-mreset-hdefault;<=> Wdisabledi2s@ff360000(rockchip,rk3308-i2srockchip,rk3066-i2s6  5^i2s_clki2s_hclku( zrxreset-mreset-h Wdisabledspdif-tx@ff3a0000,rockchip,rk3308-spdifrockchip,rk3066-spdif:  7b mclkhclku( ztxdefault? Wdisabledusb@ff4000002rockchip,rk3308-usbrockchip,rk3066-usbsnps,dwc2@  Botg peripheral @ '@ ,usb2-phyWokayusb@ff440000 generic-ehciD  G 'A,usbWokayusb@ff450000 generic-ohciE  H 'A,usbWokaymmc@ff4800000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcH@  L6 012biuciuciu-driveciu-sample@KрdefaultBCDEWokayYk| mmc@ff4900000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcI@  M6 :;<biuciuciu-driveciu-sample@KрWokayYmmc@ff4a00000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcJ@  N6 567biuciuciu-driveciu-sample@Kрdefault FGHWokay+kIwifi@1%brcm,bcm43455-fmacbrcm,bcm4329-fmac J  host-wakedefaultKnand-controller@ff4b0000(rockchip,rk3308-nfcrockchip,rv1108-nfcK@  Q-ahbnfc-рLMNOPQRdefault Wdisabledethernet@ff4e0000rockchip,rk3308-gmacN  @macirq@@BBA@C[stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speedrmiidefaultST} stmmaceth: Wdisabledspi@ff4c0000 rockchip,sfcL@  R=clk_sfchclk_sfc UVWdefault Wdisabledclock-controller@ff500000rockchip,rk3308-cruPXxin24m:JCcodec@ff560000rockchip,rk3308-codecV:mclk_txmclk_rxhclkUWcodec  Wdisabledinterrupt-controller@ff580000 arm,gic-400@XX X@ X`    /Csram@fff80000 mmio-sramD+ddr-sram@0vad-sram@8000pinctrlrockchip,rk3308-pinctrl:+DdefaultYgpio@ff220000rockchip,gpio-bank"  (K[/CJgpio@ff230000rockchip,gpio-bank#  )K[/gpio@ff240000rockchip,gpio-bank$  *K[/gpio@ff250000rockchip,gpio-bank%  +K[/gpio@ff260000rockchip,gpio-bank&  ,K[/Cpcfg-pull-upgCcpcfg-pull-downtC`pcfg-pull-noneC\pcfg-pull-none-2mapcfg-pull-up-2magpcfg-pull-up-4magCbpcfg-pull-none-4maCapcfg-pull-down-4matpcfg-pull-none-8maCZpcfg-pull-up-8magC[pcfg-pull-none-12ma C^pcfg-pull-up-12mag C]pcfg-pull-none-smtC_pcfg-output-highpcfg-output-lowpcfg-input-highgpcfg-inputemmcemmc-clk Zemmc-cmd[emmc-pwren \emmc-rstn \emmc-bus1[emmc-bus4@[[[[emmc-bus8[[[[[[[[flashflash-csn0 \COflash-rdy \CQflash-ale \CLflash-cle \CNflash-wrn\CRflash-rdn \CPflash-bus8]]]]]]]]CMsfcsfc-bus4@\\\\CWsfc-bus2 \\sfc-cs0\CVsfc-clk\CUgmacrmii-pins^^^\\\\\ \CSmac-refclk-12ma ^CTmac-refclk \gmac-m1rmiim1-pins^^^\\\\\ \macm1-refclk-12ma ^macm1-refclk \i2c0i2c0-xfer __C i2c1i2c1-xfer  _ _C i2c2i2c2-xfer __Ci2c3-m0i2c3m0-xfer __Ci2c3-m1i2c3m1-xfer  _ _i2c3-m2i2c3m2-xfer __i2s_2ch_0i2s-2ch-0-mclk \i2s-2ch-0-sclk \C;i2s-2ch-0-lrck\C<i2s-2ch-0-sdo\C>i2s-2ch-0-sdi\C=i2s_8ch_0i2s-8ch-0-mclk\i2s-8ch-0-sclktx\i2s-8ch-0-sclkrx\i2s-8ch-0-lrcktx\i2s-8ch-0-lrckrx\i2s-8ch-0-sdo0 \i2s-8ch-0-sdo1 \i2s-8ch-0-sdo2 \i2s-8ch-0-sdo3 \i2s-8ch-0-sdi0 \i2s-8ch-0-sdi1\i2s-8ch-0-sdi2\i2s-8ch-0-sdi3\i2s_8ch_1_m0i2s-8ch-1-m0-mclk\i2s-8ch-1-m0-sclktx\i2s-8ch-1-m0-sclkrx\i2s-8ch-1-m0-lrcktx\i2s-8ch-1-m0-lrckrx\i2s-8ch-1-m0-sdo0\i2s-8ch-1-m0-sdo1-sdi3\i2s-8ch-1-m0-sdo2-sdi2 \i2s-8ch-1-m0-sdo3_sdi1 \i2s-8ch-1-m0-sdi0 \i2s_8ch_1_m1i2s-8ch-1-m1-mclk \i2s-8ch-1-m1-sclktx \i2s-8ch-1-m1-sclkrx\i2s-8ch-1-m1-lrcktx\i2s-8ch-1-m1-lrckrx\i2s-8ch-1-m1-sdo0\i2s-8ch-1-m1-sdo1-sdi3\i2s-8ch-1-m1-sdo2-sdi2\i2s-8ch-1-m1-sdo3_sdi1\i2s-8ch-1-m1-sdi0\pdm_m0pdm-m0-clk\pdm-m0-sdi0 \pdm-m0-sdi1 \pdm-m0-sdi2 \pdm-m0-sdi3\pdm_m1pdm-m1-clk\pdm-m1-sdi0\pdm-m1-sdi1\pdm-m1-sdi2\pdm-m1-sdi3\pdm_m2pdm-m2-clkm\pdm-m2-clk\pdm-m2-sdi0 \pdm-m2-sdi1\pdm-m2-sdi2\pdm-m2-sdi3\pwm0pwm0-pin \pwm0-pin-pull-down `C5pwm1pwm1-pin\C6pwm1-pin-pull-down`pwm2pwm2-pin\C7pwm2-pin-pull-down`pwm3pwm3-pin\C8pwm3-pin-pull-down`pwm4pwm4-pin\C1pwm4-pin-pull-down`pwm5pwm5-pin\C2pwm5-pin-pull-down`pwm6pwm6-pin\C3pwm6-pin-pull-down`pwm7pwm7-pin\C4pwm7-pin-pull-down`pwm8pwm8-pin \C-pwm8-pin-pull-down `pwm9pwm9-pin \C.pwm9-pin-pull-down `pwm10pwm10-pin \C/pwm10-pin-pull-down `pwm11pwm11-pin\C0pwm11-pin-pull-down`rtcrtc-32k\CYsdmmcsdmmc-clkaCBsdmmc-cmdbCCsdmmc-detbCDsdmmc-pwrenasdmmc-bus1bsdmmc-bus4@bbbbCEsdiosdio-clkZCHsdio-cmd[CGsdio-pwrenZsdio-wrptZsdio-intnZsdio-bus1[sdio-bus4@[[[[CFspdif_inspdif-in\spdif_outspdif-out\C?spi0spi0-clkbC spi0-csn0bC!spi0-misobC"spi0-mosibC#spi1spi1-clk bC$spi1-csn0 bC%spi1-miso bC&spi1-mosi bC'spi1-m1spi1m1-misobspi1m1-mosibspi1m1-clkbspi1m1-csn0 bspi2spi2-clkbC)spi2-csn0bC*spi2-misobC+spi2-mosibC,tsadctsadc-otp-pin \tsadc-otp-out \uart0uart0-xfer ccCuart0-cts\Cuart0-rts\Cuart0-rts-pin\uart1uart1-xfer ccCuart1-cts\Cuart1-rts\Cuart2-m0uart2m0-xfer ccCuart2-m1uart2m1-xfer ccuart3uart3-xfer  c cCuart3-m1uart3m1-xfer ccuart4uart4-xfer  ccCuart4-cts\Cuart4-rts\Cuart4-rts-pin\bluetoothbt-reg-on \Cbt-wake-host \Chost-wake-bt \Csdio-pwrseqwifi-enable-h\Chusbotg-vbus-drv\Cgwifiwifi-host-wake`CKchosenserial2:1500000n8regulator-vcc5v0-sysregulator-fixed vcc5v0_sys'LK@?LK@Ceregulator-vdd-corepwm-regulatorWd vdd_core' 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compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1mmc2device_typeregenable-methodclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-idle-statesnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsstatusoffsetmode-bootloadermode-loadermode-normalmode-recoverymode-fastbootassigned-clocksassigned-clock-parentsclock-namesinterrupt-names#phy-cellspinctrl-namespinctrl-0reg-shiftreg-io-widthuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speeddmasdma-names#pwm-cells#io-channel-cellsresetsreset-namesvref-supplyarm,pl330-periph-burst#dma-cellsrockchip,grfdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesbus-widthfifo-depthmax-frequencycap-mmc-highspeedcap-sd-highspeeddisable-wpcard-detect-delaynon-removablecap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-mmcno-sdassigned-clock-ratesphy-mode#reset-cells#sound-dai-cells#interrupt-cellsinterrupt-controllerrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltpwmsregulator-settling-time-up-uspwm-supplyvin-supplyenable-active-highgpioreset-gpios